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<title>Zynq PS configuration detail</title>
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<p style="height: 7px">Following peripherals are selected in the design. </p>
<p><br /></p>
<h2><a name="Top">Peripheral Selected</a></h2>
<ul>
<li>Quad SPI Flash</li>
<li>Enet 0</li>
<li>USB 0</li>
<li>SD 0</li>
<li>UART 1</li>
<li>SPI 0</li>
<li>SPI 1</li>
<li>GPIO</li>
</ul>
<p>To see detailed information please follow below links:</p>
<ul>
<li><a href="#MIOConfTab">MIO Configuration Table</a></li>
<li><a href="#ZynqPerTab">Zynq Peripheral Configuration</a></li>
<li><a href="#DDRInfoTab">DDR Configuration Information</a></li>
<li>SLCR settings</li>
<ul>
<li><a href="#ps7_pll_init_data">PLL Init Data</a></li>
<li><a href="#ps7_clock_init_data">Clock Init Data</a></li>
<li><a href="#ps7_ddr_init_data">DDR Init Data</a></li>
<li><a href="#ps7_mio_init_data">MIO Init Data</a></li>
</ul>
</ul>
<h2><a name="MIOConfTab">MIO configuration Table</a></h2>
<ul><table border="1"> 
<thead><tr>                <th>MIO Pin</th>                <th>Peripheral</th>             <th>Signal</th>               <th>IO type</th>              <th>Speed</th>              <th>Pullup</th>              <th>Direction</th>              </tr></thead>
<tr bgcolor="#FA4A46"><td><a name="MIO 0">MIO 0</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[0]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 1">MIO 1</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi0_ss_b</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 2">MIO 2</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi0_io[0]</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 3">MIO 3</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi0_io[1]</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 4">MIO 4</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi0_io[2]</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 5">MIO 5</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi0_io[3]</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 6">MIO 6</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi0_sclk</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 7">MIO 7</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[7]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#FAEBD7"><td><a name="MIO 8">MIO 8</a></td><td><a href="#Quad SPI Flash">Quad SPI Flash</a></td><td>qspi_fbclk</td><td>LVCMOS 3.3V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 9">MIO 9</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[9]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 10">MIO 10</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[10]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 11">MIO 11</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[11]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 12">MIO 12</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[12]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 13">MIO 13</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[13]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 14">MIO 14</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[14]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 15">MIO 15</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[15]</td><td>LVCMOS 3.3V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 16">MIO 16</a></td><td><a href="#Enet 0">Enet 0</a></td><td>tx_clk</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 17">MIO 17</a></td><td><a href="#Enet 0">Enet 0</a></td><td>txd[0]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 18">MIO 18</a></td><td><a href="#Enet 0">Enet 0</a></td><td>txd[1]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 19">MIO 19</a></td><td><a href="#Enet 0">Enet 0</a></td><td>txd[2]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 20">MIO 20</a></td><td><a href="#Enet 0">Enet 0</a></td><td>txd[3]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 21">MIO 21</a></td><td><a href="#Enet 0">Enet 0</a></td><td>tx_ctl</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 22">MIO 22</a></td><td><a href="#Enet 0">Enet 0</a></td><td>rx_clk</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 23">MIO 23</a></td><td><a href="#Enet 0">Enet 0</a></td><td>rxd[0]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 24">MIO 24</a></td><td><a href="#Enet 0">Enet 0</a></td><td>rxd[1]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 25">MIO 25</a></td><td><a href="#Enet 0">Enet 0</a></td><td>rxd[2]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 26">MIO 26</a></td><td><a href="#Enet 0">Enet 0</a></td><td>rxd[3]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 27">MIO 27</a></td><td><a href="#Enet 0">Enet 0</a></td><td>rx_ctl</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 28">MIO 28</a></td><td><a href="#USB 0">USB 0</a></td><td>data[4]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 29">MIO 29</a></td><td><a href="#USB 0">USB 0</a></td><td>dir</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 30">MIO 30</a></td><td><a href="#USB 0">USB 0</a></td><td>stp</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 31">MIO 31</a></td><td><a href="#USB 0">USB 0</a></td><td>nxt</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 32">MIO 32</a></td><td><a href="#USB 0">USB 0</a></td><td>data[0]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 33">MIO 33</a></td><td><a href="#USB 0">USB 0</a></td><td>data[1]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 34">MIO 34</a></td><td><a href="#USB 0">USB 0</a></td><td>data[2]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 35">MIO 35</a></td><td><a href="#USB 0">USB 0</a></td><td>data[3]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 36">MIO 36</a></td><td><a href="#USB 0">USB 0</a></td><td>clk</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 37">MIO 37</a></td><td><a href="#USB 0">USB 0</a></td><td>data[5]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 38">MIO 38</a></td><td><a href="#USB 0">USB 0</a></td><td>data[6]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#7FFF00"><td><a name="MIO 39">MIO 39</a></td><td><a href="#USB 0">USB 0</a></td><td>data[7]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 40">MIO 40</a></td><td><a href="#SD 0">SD 0</a></td><td>clk</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 41">MIO 41</a></td><td><a href="#SD 0">SD 0</a></td><td>cmd</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 42">MIO 42</a></td><td><a href="#SD 0">SD 0</a></td><td>data[0]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 43">MIO 43</a></td><td><a href="#SD 0">SD 0</a></td><td>data[1]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 44">MIO 44</a></td><td><a href="#SD 0">SD 0</a></td><td>data[2]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 45">MIO 45</a></td><td><a href="#SD 0">SD 0</a></td><td>data[3]</td><td>LVCMOS 1.8V</td><td>fast</td><td>disabled</td><td>inout</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 46">MIO 46</a></td><td><a href="#SD 0">SD 0</a></td><td>wp</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#D2691E"><td><a name="MIO 47">MIO 47</a></td><td><a href="#SD 0">SD 0</a></td><td>cd</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#6495ED"><td><a name="MIO 48">MIO 48</a></td><td><a href="#UART 1">UART 1</a></td><td>tx</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#6495ED"><td><a name="MIO 49">MIO 49</a></td><td><a href="#UART 1">UART 1</a></td><td>rx</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 50">MIO 50</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[50]</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#FA4A46"><td><a name="MIO 51">MIO 51</a></td><td><a href="#GPIO">GPIO</a></td><td>gpio[51]</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>in</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 52">MIO 52</a></td><td><a href="#Enet 0">Enet 0</a></td><td>mdc</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>out</td></tr>
<tr bgcolor="#DEB887"><td><a name="MIO 53">MIO 53</a></td><td><a href="#Enet 0">Enet 0</a></td><td>mdio</td><td>LVCMOS 1.8V</td><td>slow</td><td>disabled</td><td>inout</td></tr>
</table></ul>
<li><a href="#Top">Go To TOP</a></li>
<h2><a name="ZynqPerTab">Zynq Peripheral Configuration</a></h2>
<ul><table border="1"> 
<tr><thead>             <th>Peripheral</th>                <th>Signal Group</th>             <th>Signal</th>               <th>MIO</th>              </thead></tr>
<tr bgcolor="#FAEBD7"><td><a name="Quad SPI Flash" >Quad SPI Flash</a></td>             <td></td><td></td><td>MIO 1 .. 6</td></tr>
<tr bgcolor="#FAEBD7"><td></td><td>Dual Quad SPI (4 bit) </td><td></td><td>Disabled</td></tr>
<tr bgcolor="#FAEBD7"><td></td><td>Dual Quad SPI (Parallel 8 bit)</td><td></td><td>Disabled</td></tr>
<tr bgcolor="#FAEBD7"><td></td><td>Feedback Clk</td><td></td><td>MIO 8</td></tr>
<tr bgcolor="#FFFFFF"><td><a name="nor" >SRAM/NOR Flash</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#FFE4C4"><td><a name="nand" >NAND Flash</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#DEB887"><td><a name="Enet 0" >Enet 0</a></td>             <td></td><td></td><td>MIO 16 .. 27</td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>tx_clk</td><td><a href="#MIO 16">MIO 16</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>txd[3]</td><td><a href="#MIO 20">MIO 20</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>txd[2]</td><td><a href="#MIO 19">MIO 19</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>txd[1]</td><td><a href="#MIO 18">MIO 18</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>txd[0]</td><td><a href="#MIO 17">MIO 17</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>tx_ctl</td><td><a href="#MIO 21">MIO 21</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>rx_clk</td><td><a href="#MIO 22">MIO 22</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>rxd[3]</td><td><a href="#MIO 26">MIO 26</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>rxd[2]</td><td><a href="#MIO 25">MIO 25</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>rxd[1]</td><td><a href="#MIO 24">MIO 24</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>rxd[0]</td><td><a href="#MIO 23">MIO 23</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>rx_ctl</td><td><a href="#MIO 27">MIO 27</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td>MDIO</td><td></td><td>MIO 52 .. 53</td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>mdc</td><td><a href="#MIO 52">MIO 52</a></td></tr>
<tr bgcolor="#DEB887"><td></td><td></td><td>mdio</td><td><a href="#MIO 53">MIO 53</a></td></tr>
<tr bgcolor="#DEB887"><td><a name="enet1" >Enet 1</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#7FFF00"><td><a name="USB 0" >USB 0</a></td>             <td></td><td></td><td>MIO 28 .. 39</td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>clk</td><td><a href="#MIO 36">MIO 36</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>dir</td><td><a href="#MIO 29">MIO 29</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>stp</td><td><a href="#MIO 30">MIO 30</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>nxt</td><td><a href="#MIO 31">MIO 31</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[0]</td><td><a href="#MIO 32">MIO 32</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[1]</td><td><a href="#MIO 33">MIO 33</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[2]</td><td><a href="#MIO 34">MIO 34</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[3]</td><td><a href="#MIO 35">MIO 35</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[4]</td><td><a href="#MIO 28">MIO 28</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[5]</td><td><a href="#MIO 37">MIO 37</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[6]</td><td><a href="#MIO 38">MIO 38</a></td></tr>
<tr bgcolor="#7FFF00"><td></td><td></td><td>data[7]</td><td><a href="#MIO 39">MIO 39</a></td></tr>
<tr bgcolor="#7FFF00"><td><a name="usb1" >USB 1</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#D2691E"><td><a name="SD 0" >SD 0</a></td>             <td></td><td></td><td>MIO 40 .. 45</td></tr>
<tr bgcolor="#D2691E"><td></td><td>CD</td><td></td><td>MIO 47</td></tr>
<tr bgcolor="#D2691E"><td></td><td>WP</td><td></td><td>MIO 46</td></tr>
<tr bgcolor="#D2691E"><td></td><td>Power</td><td></td><td>Disabled</td></tr>
<tr bgcolor="#D2691E"><td><a name="sd1" >SD 1</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#6495ED"><td><a name="uart0" >UART 0</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#6495ED"><td><a name="UART 1" >UART 1</a></td>             <td></td><td></td><td>MIO 48 .. 49</td></tr>
<tr bgcolor="#6495ED"><td></td><td></td><td>rx</td><td><a href="#MIO 49">MIO 49</a></td></tr>
<tr bgcolor="#6495ED"><td></td><td></td><td>tx</td><td><a href="#MIO 48">MIO 48</a></td></tr>
<tr bgcolor="#6495ED"><td></td><td>Modem Signals</td><td></td><td>Disabled</td></tr>
<tr bgcolor="#BDB76B"><td><a name="i2c0" >I2C 0</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#BDB76B"><td><a name="i2c1" >I2C 1</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#8DBC8F"><td><a name="SPI 0" >SPI 0</a></td>             <td></td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td></td><td>SS[0]</td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td></td><td>SS[1]</td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td></td><td>SS[2]</td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td><a name="SPI 1" >SPI 1</a></td>             <td></td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td></td><td>SS[0]</td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td></td><td>SS[1]</td><td></td><td>EMIO</td></tr>
<tr bgcolor="#8DBC8F"><td></td><td>SS[2]</td><td></td><td>EMIO</td></tr>
<tr bgcolor="#DAA520"><td><a name="can0" >CAN 0</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#DAA520"><td><a name="can1" >CAN 1</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#ADD8E6"><td><a name="trace" >Trace</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#BC8F8F"><td><a name="ttc0" >Timer 0</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#BC8F8F"><td><a name="ttc1" >Timer 1</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#FF6347"><td><a name="wdt" >Watchdog</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#EE82EE"><td><a name="pjtag" >PJTAG</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#FA4A46"><td><a name="GPIO" >GPIO</a></td>             <td></td><td></td><td>MIO</td></tr>
<tr bgcolor="#FFFFFF"><td><a name="mode" >Mode</a></td>             <td></td><td></td><td>Disabled</td></tr>
<tr bgcolor="#FFFFFF"><td><a name="vcfg" >VCfg</a></td>             <td></td><td></td><td>Disabled</td></tr>
</table></ul>
<li><a href="#Top">Go To TOP</a></li>
<h2><a name="DDRInfoTab">DDR Memory information</a></h2>
<h3><a name="DDRInfoTab">DDR Controller Configuration</a></h3>
<ul><table border="1"> 
<tr><thead>                 <th>Parameter</th>                    <th>Value</th>                 </thead></tr>
<tr> <td><a name="Enable DDR">Enable DDR</a></td><td>1</td></tr>
<tr> <td><a name="Memory Type">Memory Type</a></td><td>DDR 3</td></tr>
<tr> <td><a name="Memory Part">Memory Part</a></td><td>MT41J128M16 HA-15E</td></tr>
<tr> <td><a name="DRAM bus width">DRAM bus width</a></td><td>32 Bit</td></tr>
<tr> <td><a name="ECC">ECC</a></td><td>Disabled</td></tr>
<tr> <td><a name="BURST Length (lppdr only)">BURST Length (lppdr only)</a></td><td>8</td></tr>
<tr> <td><a name="Internal Vref">Internal Vref</a></td><td>1</td></tr>
<tr> <td><a name="Operating Frequency (MHz)">Operating Frequency (MHz)</a></td><td>533.333313</td></tr>
<tr> <td><a name="HIGH temperature">HIGH temperature</a></td><td>Normal (0-85)</td></tr>
</table></ul>
<h3><a name="DDRInfoTab">Memory Part Configuration</a></h3>
<ul><table border="1"> 
<tr><thead>                 <th>Parameter</th>                    <th>Value</th>                 </thead></tr>
<tr> <td><a name="DRAM IC bus width">DRAM IC bus width</a></td><td>16 Bits</td></tr>
<tr> <td><a name="DRAM Device Capacity">DRAM Device Capacity</a></td><td>2048 MBits</td></tr>
<tr> <td><a name="Speed Bin">Speed Bin</a></td><td>DDR3_1066F</td></tr>
<tr> <td><a name="BANK Address Count">BANK Address Count</a></td><td>3</td></tr>
<tr> <td><a name="ROW Address Count">ROW Address Count</a></td><td>14</td></tr>
<tr> <td><a name="COLUMN Address Count">COLUMN Address Count</a></td><td>10</td></tr>
<tr> <td><a name="CAS Latency">CAS Latency</a></td><td>7</td></tr>
<tr> <td><a name="CAS Write Latency">CAS Write Latency</a></td><td>6</td></tr>
<tr> <td><a name="RAS to CAS Delay">RAS to CAS Delay</a></td><td>7</td></tr>
<tr> <td><a name="RECHARGE Time">RECHARGE Time</a></td><td>7</td></tr>
<tr> <td><a name="tRC (ns )">tRC (ns )</a></td><td>49.5</td></tr>
<tr> <td><a name="tRASmin ( ns )">tRASmin ( ns )</a></td><td>36.0</td></tr>
<tr> <td><a name="tFAW">tFAW</a></td><td>45.0</td></tr>
<tr> <td><a name="ADDITIVE Latency">ADDITIVE Latency</a></td><td>0</td></tr>
</table></ul>
<h3><a name="DDRInfoTab">Training/Board Details</a></h3>
<ul><table border="1"> 
<tr><thead>                 <th>Parameter</th>                    <th>Value</th>                 </thead></tr>
<tr> <td><a name="Write levelling">Write levelling</a></td><td>1</td></tr>
<tr> <td><a name="Read gate">Read gate</a></td><td>1</td></tr>
<tr> <td><a name="Read data eye">Read data eye</a></td><td>1</td></tr>
<tr> <td><a name="DQS to Clock delay [0] (ns)">DQS to Clock delay [0] (ns)</a></td><td>0.025</td></tr>
<tr> <td><a name="DQS to Clock delay [1] (ns)">DQS to Clock delay [1] (ns)</a></td><td>0.028</td></tr>
<tr> <td><a name="DQS to Clock delay [2] (ns)">DQS to Clock delay [2] (ns)</a></td><td>-0.009</td></tr>
<tr> <td><a name="DQS to Clock delay [3] (ns)">DQS to Clock delay [3] (ns)</a></td><td>-0.061</td></tr>
<tr> <td><a name="Board delay [0] (ns)">Board delay [0] (ns)</a></td><td>0.41</td></tr>
<tr> <td><a name="Board delay [1] (ns)">Board delay [1] (ns)</a></td><td>0.411</td></tr>
<tr> <td><a name="Board delay [2] (ns)">Board delay [2] (ns)</a></td><td>0.341</td></tr>
<tr> <td><a name="Board delay [3] (ns)">Board delay [3] (ns)</a></td><td>0.358</td></tr>
</table></ul>
<li><a href="#Top">Go To TOP</a></li>
<h1><a name="ps7_pll_init_data">ps7_pll_init_data</a></h1>
<ul>
<h2>SLCR SETTINGS</h2>
<ul>
<p>SLCR SETTINGS</p>
<li><p>Register : SLCR_UNLOCK @ 0XF8000008</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >UNLOCK_KEY</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">df0d</td><td class="hex">df0d</td></tr>
<tr><td><b>SLCR_UNLOCK @ 0XF8000008</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>df0d</b></td></tr></table>
</li>
</ul>
<h2>PLL SLCR REGISTERS</h2>
<ul>
<p>PLL SLCR REGISTERS</p>
<h2>ARM PLL INIT</h2>
<ul>
<p>ARM PLL INIT</p>
<li><p>Register : ARM_PLL_CFG @ 0XF8000110</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RES</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">2</td><td class="hex">20</td></tr>
<tr><td >PLL_CP</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">2</td><td class="hex">200</td></tr>
<tr><td >LOCK_CNT</td><td class="hex">21:12</td><td class="hex">3ff000</td><td class="hex">fa</td><td class="hex">fa000</td></tr>
<tr><td><b>ARM_PLL_CFG @ 0XF8000110</td><td></td><td class="hex"><b>3ffff0</b></td><td></td><td class="hex"><b>fa220</b></td></tr></table>
</li>
<h2>UPDATE FB_DIV</h2>
<ul>
<p>UPDATE FB_DIV</p>
<li><p>Register : ARM_PLL_CTRL @ 0XF8000100</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_FDIV</td><td class="hex">18:12</td><td class="hex">7f000</td><td class="hex">28</td><td class="hex">28000</td></tr>
<tr><td><b>ARM_PLL_CTRL @ 0XF8000100</td><td></td><td class="hex"><b>7f000</b></td><td></td><td class="hex"><b>28000</b></td></tr></table>
</li>
</ul>
<h2>BY PASS PLL</h2>
<ul>
<p>BY PASS PLL</p>
<li><p>Register : ARM_PLL_CTRL @ 0XF8000100</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_BYPASS_FORCE</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td><b>ARM_PLL_CTRL @ 0XF8000100</td><td></td><td class="hex"><b>10</b></td><td></td><td class="hex"><b>10</b></td></tr></table>
</li>
</ul>
<h2>ASSERT RESET</h2>
<ul>
<p>ASSERT RESET</p>
<li><p>Register : ARM_PLL_CTRL @ 0XF8000100</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>ARM_PLL_CTRL @ 0XF8000100</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
</ul>
<h2>DEASSERT RESET</h2>
<ul>
<p>DEASSERT RESET</p>
<li><p>Register : ARM_PLL_CTRL @ 0XF8000100</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>ARM_PLL_CTRL @ 0XF8000100</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
<h2>CHECK PLL STATUS</h2>
<ul>
<p>CHECK PLL STATUS</p>
<li><p>Register : PLL_STATUS @ 0XF800010C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >ARM_PLL_LOCK</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>PLL_STATUS @ 0XF800010C</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
</ul>
<h2>REMOVE PLL BY PASS</h2>
<ul>
<p>REMOVE PLL BY PASS</p>
<li><p>Register : ARM_PLL_CTRL @ 0XF8000100</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_BYPASS_FORCE</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>ARM_PLL_CTRL @ 0XF8000100</td><td></td><td class="hex"><b>10</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
<li><p>Register : ARM_CLK_CTRL @ 0XF8000120</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">2</td><td class="hex">200</td></tr>
<tr><td >CPU_6OR4XCLKACT</td><td class="hex">24:24</td><td class="hex">1000000</td><td class="hex">1</td><td class="hex">1000000</td></tr>
<tr><td >CPU_3OR2XCLKACT</td><td class="hex">25:25</td><td class="hex">2000000</td><td class="hex">1</td><td class="hex">2000000</td></tr>
<tr><td >CPU_2XCLKACT</td><td class="hex">26:26</td><td class="hex">4000000</td><td class="hex">1</td><td class="hex">4000000</td></tr>
<tr><td >CPU_1XCLKACT</td><td class="hex">27:27</td><td class="hex">8000000</td><td class="hex">1</td><td class="hex">8000000</td></tr>
<tr><td >CPU_PERI_CLKACT</td><td class="hex">28:28</td><td class="hex">10000000</td><td class="hex">1</td><td class="hex">10000000</td></tr>
<tr><td><b>ARM_CLK_CTRL @ 0XF8000120</td><td></td><td class="hex"><b>1f003f30</b></td><td></td><td class="hex"><b>1f000200</b></td></tr></table>
</li>
</ul>
<h2>DDR PLL INIT</h2>
<ul>
<p>DDR PLL INIT</p>
<li><p>Register : DDR_PLL_CFG @ 0XF8000114</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RES</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">2</td><td class="hex">20</td></tr>
<tr><td >PLL_CP</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">2</td><td class="hex">200</td></tr>
<tr><td >LOCK_CNT</td><td class="hex">21:12</td><td class="hex">3ff000</td><td class="hex">12c</td><td class="hex">12c000</td></tr>
<tr><td><b>DDR_PLL_CFG @ 0XF8000114</td><td></td><td class="hex"><b>3ffff0</b></td><td></td><td class="hex"><b>12c220</b></td></tr></table>
</li>
<h2>UPDATE FB_DIV</h2>
<ul>
<p>UPDATE FB_DIV</p>
<li><p>Register : DDR_PLL_CTRL @ 0XF8000104</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_FDIV</td><td class="hex">18:12</td><td class="hex">7f000</td><td class="hex">20</td><td class="hex">20000</td></tr>
<tr><td><b>DDR_PLL_CTRL @ 0XF8000104</td><td></td><td class="hex"><b>7f000</b></td><td></td><td class="hex"><b>20000</b></td></tr></table>
</li>
</ul>
<h2>BY PASS PLL</h2>
<ul>
<p>BY PASS PLL</p>
<li><p>Register : DDR_PLL_CTRL @ 0XF8000104</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_BYPASS_FORCE</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td><b>DDR_PLL_CTRL @ 0XF8000104</td><td></td><td class="hex"><b>10</b></td><td></td><td class="hex"><b>10</b></td></tr></table>
</li>
</ul>
<h2>ASSERT RESET</h2>
<ul>
<p>ASSERT RESET</p>
<li><p>Register : DDR_PLL_CTRL @ 0XF8000104</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>DDR_PLL_CTRL @ 0XF8000104</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
</ul>
<h2>DEASSERT RESET</h2>
<ul>
<p>DEASSERT RESET</p>
<li><p>Register : DDR_PLL_CTRL @ 0XF8000104</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDR_PLL_CTRL @ 0XF8000104</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
<h2>CHECK PLL STATUS</h2>
<ul>
<p>CHECK PLL STATUS</p>
<li><p>Register : PLL_STATUS @ 0XF800010C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DDR_PLL_LOCK</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td><b>PLL_STATUS @ 0XF800010C</td><td></td><td class="hex"><b>2</b></td><td></td><td class="hex"><b>2</b></td></tr></table>
</li>
</ul>
<h2>REMOVE PLL BY PASS</h2>
<ul>
<p>REMOVE PLL BY PASS</p>
<li><p>Register : DDR_PLL_CTRL @ 0XF8000104</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_BYPASS_FORCE</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDR_PLL_CTRL @ 0XF8000104</td><td></td><td class="hex"><b>10</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
<li><p>Register : DDR_CLK_CTRL @ 0XF8000124</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DDR_3XCLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >DDR_2XCLKACT</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >DDR_3XCLK_DIVISOR</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">2</td><td class="hex">200000</td></tr>
<tr><td >DDR_2XCLK_DIVISOR</td><td class="hex">31:26</td><td class="hex">fc000000</td><td class="hex">3</td><td class="hex">c000000</td></tr>
<tr><td><b>DDR_CLK_CTRL @ 0XF8000124</td><td></td><td class="hex"><b>fff00003</b></td><td></td><td class="hex"><b>c200003</b></td></tr></table>
</li>
</ul>
<h2>IO PLL INIT</h2>
<ul>
<p>IO PLL INIT</p>
<li><p>Register : IO_PLL_CFG @ 0XF8000118</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RES</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">c</td><td class="hex">c0</td></tr>
<tr><td >PLL_CP</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">2</td><td class="hex">200</td></tr>
<tr><td >LOCK_CNT</td><td class="hex">21:12</td><td class="hex">3ff000</td><td class="hex">145</td><td class="hex">145000</td></tr>
<tr><td><b>IO_PLL_CFG @ 0XF8000118</td><td></td><td class="hex"><b>3ffff0</b></td><td></td><td class="hex"><b>1452c0</b></td></tr></table>
</li>
<h2>UPDATE FB_DIV</h2>
<ul>
<p>UPDATE FB_DIV</p>
<li><p>Register : IO_PLL_CTRL @ 0XF8000108</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_FDIV</td><td class="hex">18:12</td><td class="hex">7f000</td><td class="hex">1e</td><td class="hex">1e000</td></tr>
<tr><td><b>IO_PLL_CTRL @ 0XF8000108</td><td></td><td class="hex"><b>7f000</b></td><td></td><td class="hex"><b>1e000</b></td></tr></table>
</li>
</ul>
<h2>BY PASS PLL</h2>
<ul>
<p>BY PASS PLL</p>
<li><p>Register : IO_PLL_CTRL @ 0XF8000108</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_BYPASS_FORCE</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td><b>IO_PLL_CTRL @ 0XF8000108</td><td></td><td class="hex"><b>10</b></td><td></td><td class="hex"><b>10</b></td></tr></table>
</li>
</ul>
<h2>ASSERT RESET</h2>
<ul>
<p>ASSERT RESET</p>
<li><p>Register : IO_PLL_CTRL @ 0XF8000108</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>IO_PLL_CTRL @ 0XF8000108</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
</ul>
<h2>DEASSERT RESET</h2>
<ul>
<p>DEASSERT RESET</p>
<li><p>Register : IO_PLL_CTRL @ 0XF8000108</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>IO_PLL_CTRL @ 0XF8000108</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
<h2>CHECK PLL STATUS</h2>
<ul>
<p>CHECK PLL STATUS</p>
<li><p>Register : PLL_STATUS @ 0XF800010C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >IO_PLL_LOCK</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td><b>PLL_STATUS @ 0XF800010C</td><td></td><td class="hex"><b>4</b></td><td></td><td class="hex"><b>4</b></td></tr></table>
</li>
</ul>
<h2>REMOVE PLL BY PASS</h2>
<ul>
<p>REMOVE PLL BY PASS</p>
<li><p>Register : IO_PLL_CTRL @ 0XF8000108</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PLL_BYPASS_FORCE</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>IO_PLL_CTRL @ 0XF8000108</td><td></td><td class="hex"><b>10</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
</ul>
</ul>
<h2>LOCK IT BACK</h2>
<ul>
<p>LOCK IT BACK</p>
<li><p>Register : SLCR_LOCK @ 0XF8000004</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >LOCK_KEY</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">767b</td><td class="hex">767b</td></tr>
<tr><td><b>SLCR_LOCK @ 0XF8000004</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>767b</b></td></tr></table>
</li>
</ul>
</ul>
<hr/>
<h1><a name="ps7_clock_init_data">ps7_clock_init_data</a></h1>
<ul>
<h2>SLCR SETTINGS</h2>
<ul>
<p>SLCR SETTINGS</p>
<li><p>Register : SLCR_UNLOCK @ 0XF8000008</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >UNLOCK_KEY</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">df0d</td><td class="hex">df0d</td></tr>
<tr><td><b>SLCR_UNLOCK @ 0XF8000008</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>df0d</b></td></tr></table>
</li>
</ul>
<h2>CLOCK CONTROL SLCR REGISTERS</h2>
<ul>
<p>CLOCK CONTROL SLCR REGISTERS</p>
<li><p>Register : DCI_CLK_CTRL @ 0XF8000128</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >DIVISOR0</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">23</td><td class="hex">2300</td></tr>
<tr><td >DIVISOR1</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">3</td><td class="hex">300000</td></tr>
<tr><td><b>DCI_CLK_CTRL @ 0XF8000128</td><td></td><td class="hex"><b>3f03f01</b></td><td></td><td class="hex"><b>302301</b></td></tr></table>
</li>
<li><p>Register : GEM0_RCLK_CTRL @ 0XF8000138</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >SRCSEL</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>GEM0_RCLK_CTRL @ 0XF8000138</td><td></td><td class="hex"><b>11</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
<li><p>Register : GEM0_CLK_CTRL @ 0XF8000140</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >SRCSEL</td><td class="hex">6:4</td><td class="hex">70</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">8</td><td class="hex">800</td></tr>
<tr><td >DIVISOR1</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">1</td><td class="hex">100000</td></tr>
<tr><td><b>GEM0_CLK_CTRL @ 0XF8000140</td><td></td><td class="hex"><b>3f03f71</b></td><td></td><td class="hex"><b>100801</b></td></tr></table>
</li>
<li><p>Register : LQSPI_CLK_CTRL @ 0XF800014C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">2</td><td class="hex">20</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">7</td><td class="hex">700</td></tr>
<tr><td><b>LQSPI_CLK_CTRL @ 0XF800014C</td><td></td><td class="hex"><b>3f31</b></td><td></td><td class="hex"><b>721</b></td></tr></table>
</li>
<li><p>Register : SDIO_CLK_CTRL @ 0XF8000150</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT0</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >CLKACT1</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">14</td><td class="hex">1400</td></tr>
<tr><td><b>SDIO_CLK_CTRL @ 0XF8000150</td><td></td><td class="hex"><b>3f33</b></td><td></td><td class="hex"><b>1401</b></td></tr></table>
</li>
<li><p>Register : UART_CLK_CTRL @ 0XF8000154</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT0</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >CLKACT1</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">14</td><td class="hex">1400</td></tr>
<tr><td><b>UART_CLK_CTRL @ 0XF8000154</td><td></td><td class="hex"><b>3f33</b></td><td></td><td class="hex"><b>1402</b></td></tr></table>
</li>
<li><p>Register : SPI_CLK_CTRL @ 0XF8000158</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT0</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >CLKACT1</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">a</td><td class="hex">a00</td></tr>
<tr><td><b>SPI_CLK_CTRL @ 0XF8000158</td><td></td><td class="hex"><b>3f33</b></td><td></td><td class="hex"><b>a03</b></td></tr></table>
</li>
<li><p>Register : PCAP_CLK_CTRL @ 0XF8000168</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">5</td><td class="hex">500</td></tr>
<tr><td><b>PCAP_CLK_CTRL @ 0XF8000168</td><td></td><td class="hex"><b>3f31</b></td><td></td><td class="hex"><b>501</b></td></tr></table>
</li>
<li><p>Register : FPGA0_CLK_CTRL @ 0XF8000170</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR0</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">a</td><td class="hex">a00</td></tr>
<tr><td >DIVISOR1</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">1</td><td class="hex">100000</td></tr>
<tr><td><b>FPGA0_CLK_CTRL @ 0XF8000170</td><td></td><td class="hex"><b>3f03f30</b></td><td></td><td class="hex"><b>100a00</b></td></tr></table>
</li>
<li><p>Register : FPGA1_CLK_CTRL @ 0XF8000180</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR0</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">7</td><td class="hex">700</td></tr>
<tr><td >DIVISOR1</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">1</td><td class="hex">100000</td></tr>
<tr><td><b>FPGA1_CLK_CTRL @ 0XF8000180</td><td></td><td class="hex"><b>3f03f30</b></td><td></td><td class="hex"><b>100700</b></td></tr></table>
</li>
<li><p>Register : FPGA2_CLK_CTRL @ 0XF8000190</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR0</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">5</td><td class="hex">500</td></tr>
<tr><td >DIVISOR1</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">1</td><td class="hex">100000</td></tr>
<tr><td><b>FPGA2_CLK_CTRL @ 0XF8000190</td><td></td><td class="hex"><b>3f03f30</b></td><td></td><td class="hex"><b>100500</b></td></tr></table>
</li>
<li><p>Register : FPGA3_CLK_CTRL @ 0XF80001A0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >SRCSEL</td><td class="hex">5:4</td><td class="hex">30</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DIVISOR0</td><td class="hex">13:8</td><td class="hex">3f00</td><td class="hex">10</td><td class="hex">1000</td></tr>
<tr><td >DIVISOR1</td><td class="hex">25:20</td><td class="hex">3f00000</td><td class="hex">1</td><td class="hex">100000</td></tr>
<tr><td><b>FPGA3_CLK_CTRL @ 0XF80001A0</td><td></td><td class="hex"><b>3f03f30</b></td><td></td><td class="hex"><b>101000</b></td></tr></table>
</li>
<li><p>Register : CLK_621_TRUE @ 0XF80001C4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CLK_621_TRUE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>CLK_621_TRUE @ 0XF80001C4</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
<li><p>Register : APER_CLK_CTRL @ 0XF800012C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DMA_CPU_2XCLKACT</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >USB0_CPU_1XCLKACT</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >USB1_CPU_1XCLKACT</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">1</td><td class="hex">8</td></tr>
<tr><td >GEM0_CPU_1XCLKACT</td><td class="hex">6:6</td><td class="hex">40</td><td class="hex">1</td><td class="hex">40</td></tr>
<tr><td >GEM1_CPU_1XCLKACT</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >SDI0_CPU_1XCLKACT</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">1</td><td class="hex">400</td></tr>
<tr><td >SDI1_CPU_1XCLKACT</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >SPI0_CPU_1XCLKACT</td><td class="hex">14:14</td><td class="hex">4000</td><td class="hex">1</td><td class="hex">4000</td></tr>
<tr><td >SPI1_CPU_1XCLKACT</td><td class="hex">15:15</td><td class="hex">8000</td><td class="hex">1</td><td class="hex">8000</td></tr>
<tr><td >CAN0_CPU_1XCLKACT</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >CAN1_CPU_1XCLKACT</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >I2C0_CPU_1XCLKACT</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">1</td><td class="hex">40000</td></tr>
<tr><td >I2C1_CPU_1XCLKACT</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td >UART0_CPU_1XCLKACT</td><td class="hex">20:20</td><td class="hex">100000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >UART1_CPU_1XCLKACT</td><td class="hex">21:21</td><td class="hex">200000</td><td class="hex">1</td><td class="hex">200000</td></tr>
<tr><td >GPIO_CPU_1XCLKACT</td><td class="hex">22:22</td><td class="hex">400000</td><td class="hex">1</td><td class="hex">400000</td></tr>
<tr><td >LQSPI_CPU_1XCLKACT</td><td class="hex">23:23</td><td class="hex">800000</td><td class="hex">1</td><td class="hex">800000</td></tr>
<tr><td >SMC_CPU_1XCLKACT</td><td class="hex">24:24</td><td class="hex">1000000</td><td class="hex">1</td><td class="hex">1000000</td></tr>
<tr><td><b>APER_CLK_CTRL @ 0XF800012C</td><td></td><td class="hex"><b>1ffcccd</b></td><td></td><td class="hex"><b>1ecc44d</b></td></tr></table>
</li>
</ul>
<h2>THIS SHOULD BE BLANK</h2>
<ul>
<p>THIS SHOULD BE BLANK</p>
</ul>
<h2>LOCK IT BACK</h2>
<ul>
<p>LOCK IT BACK</p>
<li><p>Register : SLCR_LOCK @ 0XF8000004</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >LOCK_KEY</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">767b</td><td class="hex">767b</td></tr>
<tr><td><b>SLCR_LOCK @ 0XF8000004</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>767b</b></td></tr></table>
</li>
</ul>
</ul>
<hr/>
<h1><a name="ps7_ddr_init_data">ps7_ddr_init_data</a></h1>
<ul>
<h2>DDR INITIALIZATION</h2>
<ul>
<p>DDR INITIALIZATION</p>
<h2>LOCK DDR</h2>
<ul>
<p>LOCK DDR</p>
<li><p>Register : ddrc_ctrl @ 0XF8006000</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_soft_rstb</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_powerdown_en</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_data_bus_width</td><td class="hex">3:2</td><td class="hex">c</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_burst8_refresh</td><td class="hex">6:4</td><td class="hex">70</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rdwr_idle_gap</td><td class="hex">13:7</td><td class="hex">3f80</td><td class="hex">1</td><td class="hex">80</td></tr>
<tr><td >reg_ddrc_dis_rd_bypass</td><td class="hex">14:14</td><td class="hex">4000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_act_bypass</td><td class="hex">15:15</td><td class="hex">8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_auto_refresh</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>ddrc_ctrl @ 0XF8006000</td><td></td><td class="hex"><b>1ffff</b></td><td></td><td class="hex"><b>80</b></td></tr></table>
</li>
</ul>
<li><p>Register : Two_rank_cfg @ 0XF8006004</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_t_rfc_nom_x32</td><td class="hex">11:0</td><td class="hex">fff</td><td class="hex">81</td><td class="hex">81</td></tr>
<tr><td >reg_ddrc_active_ranks</td><td class="hex">13:12</td><td class="hex">3000</td><td class="hex">1</td><td class="hex">1000</td></tr>
<tr><td >reg_ddrc_addrmap_cs_bit0</td><td class="hex">18:14</td><td class="hex">7c000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_wr_odt_block</td><td class="hex">20:19</td><td class="hex">180000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td >reg_ddrc_diff_rank_rd_2cycle_gap</td><td class="hex">21:21</td><td class="hex">200000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_cs_bit1</td><td class="hex">26:22</td><td class="hex">7c00000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_open_bank</td><td class="hex">27:27</td><td class="hex">8000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_4bank_ram</td><td class="hex">28:28</td><td class="hex">10000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>Two_rank_cfg @ 0XF8006004</td><td></td><td class="hex"><b>1fffffff</b></td><td></td><td class="hex"><b>81081</b></td></tr></table>
</li>
<li><p>Register : HPR_reg @ 0XF8006008</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_hpr_min_non_critical_x32</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">f</td><td class="hex">f</td></tr>
<tr><td >reg_ddrc_hpr_max_starve_x32</td><td class="hex">21:11</td><td class="hex">3ff800</td><td class="hex">f</td><td class="hex">7800</td></tr>
<tr><td >reg_ddrc_hpr_xact_run_length</td><td class="hex">25:22</td><td class="hex">3c00000</td><td class="hex">f</td><td class="hex">3c00000</td></tr>
<tr><td><b>HPR_reg @ 0XF8006008</td><td></td><td class="hex"><b>3ffffff</b></td><td></td><td class="hex"><b>3c0780f</b></td></tr></table>
</li>
<li><p>Register : LPR_reg @ 0XF800600C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_lpr_min_non_critical_x32</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_ddrc_lpr_max_starve_x32</td><td class="hex">21:11</td><td class="hex">3ff800</td><td class="hex">2</td><td class="hex">1000</td></tr>
<tr><td >reg_ddrc_lpr_xact_run_length</td><td class="hex">25:22</td><td class="hex">3c00000</td><td class="hex">8</td><td class="hex">2000000</td></tr>
<tr><td><b>LPR_reg @ 0XF800600C</td><td></td><td class="hex"><b>3ffffff</b></td><td></td><td class="hex"><b>2001001</b></td></tr></table>
</li>
<li><p>Register : WR_reg @ 0XF8006010</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_w_min_non_critical_x32</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_ddrc_w_xact_run_length</td><td class="hex">14:11</td><td class="hex">7800</td><td class="hex">8</td><td class="hex">4000</td></tr>
<tr><td >reg_ddrc_w_max_starve_x32</td><td class="hex">25:15</td><td class="hex">3ff8000</td><td class="hex">2</td><td class="hex">10000</td></tr>
<tr><td><b>WR_reg @ 0XF8006010</td><td></td><td class="hex"><b>3ffffff</b></td><td></td><td class="hex"><b>14001</b></td></tr></table>
</li>
<li><p>Register : DRAM_param_reg0 @ 0XF8006014</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_t_rc</td><td class="hex">5:0</td><td class="hex">3f</td><td class="hex">1b</td><td class="hex">1b</td></tr>
<tr><td >reg_ddrc_t_rfc_min</td><td class="hex">13:6</td><td class="hex">3fc0</td><td class="hex">56</td><td class="hex">1580</td></tr>
<tr><td >reg_ddrc_post_selfref_gap_x32</td><td class="hex">20:14</td><td class="hex">1fc000</td><td class="hex">10</td><td class="hex">40000</td></tr>
<tr><td><b>DRAM_param_reg0 @ 0XF8006014</td><td></td><td class="hex"><b>1fffff</b></td><td></td><td class="hex"><b>4159b</b></td></tr></table>
</li>
<li><p>Register : DRAM_param_reg1 @ 0XF8006018</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_wr2pre</td><td class="hex">4:0</td><td class="hex">1f</td><td class="hex">12</td><td class="hex">12</td></tr>
<tr><td >reg_ddrc_powerdown_to_x32</td><td class="hex">9:5</td><td class="hex">3e0</td><td class="hex">6</td><td class="hex">c0</td></tr>
<tr><td >reg_ddrc_t_faw</td><td class="hex">15:10</td><td class="hex">fc00</td><td class="hex">18</td><td class="hex">6000</td></tr>
<tr><td >reg_ddrc_t_ras_max</td><td class="hex">21:16</td><td class="hex">3f0000</td><td class="hex">24</td><td class="hex">240000</td></tr>
<tr><td >reg_ddrc_t_ras_min</td><td class="hex">26:22</td><td class="hex">7c00000</td><td class="hex">14</td><td class="hex">5000000</td></tr>
<tr><td >reg_ddrc_t_cke</td><td class="hex">31:28</td><td class="hex">f0000000</td><td class="hex">4</td><td class="hex">40000000</td></tr>
<tr><td><b>DRAM_param_reg1 @ 0XF8006018</td><td></td><td class="hex"><b>f7ffffff</b></td><td></td><td class="hex"><b>452460d2</b></td></tr></table>
</li>
<li><p>Register : DRAM_param_reg2 @ 0XF800601C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_write_latency</td><td class="hex">4:0</td><td class="hex">1f</td><td class="hex">5</td><td class="hex">5</td></tr>
<tr><td >reg_ddrc_rd2wr</td><td class="hex">9:5</td><td class="hex">3e0</td><td class="hex">7</td><td class="hex">e0</td></tr>
<tr><td >reg_ddrc_wr2rd</td><td class="hex">14:10</td><td class="hex">7c00</td><td class="hex">e</td><td class="hex">3800</td></tr>
<tr><td >reg_ddrc_t_xp</td><td class="hex">19:15</td><td class="hex">f8000</td><td class="hex">4</td><td class="hex">20000</td></tr>
<tr><td >reg_ddrc_pad_pd</td><td class="hex">22:20</td><td class="hex">700000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rd2pre</td><td class="hex">27:23</td><td class="hex">f800000</td><td class="hex">4</td><td class="hex">2000000</td></tr>
<tr><td >reg_ddrc_t_rcd</td><td class="hex">31:28</td><td class="hex">f0000000</td><td class="hex">7</td><td class="hex">70000000</td></tr>
<tr><td><b>DRAM_param_reg2 @ 0XF800601C</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>720238e5</b></td></tr></table>
</li>
<li><p>Register : DRAM_param_reg3 @ 0XF8006020</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_t_ccd</td><td class="hex">4:2</td><td class="hex">1c</td><td class="hex">4</td><td class="hex">10</td></tr>
<tr><td >reg_ddrc_t_rrd</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">6</td><td class="hex">c0</td></tr>
<tr><td >reg_ddrc_refresh_margin</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">2</td><td class="hex">200</td></tr>
<tr><td >reg_ddrc_t_rp</td><td class="hex">15:12</td><td class="hex">f000</td><td class="hex">7</td><td class="hex">7000</td></tr>
<tr><td >reg_ddrc_refresh_to_x32</td><td class="hex">20:16</td><td class="hex">1f0000</td><td class="hex">8</td><td class="hex">80000</td></tr>
<tr><td >reg_ddrc_sdram</td><td class="hex">21:21</td><td class="hex">200000</td><td class="hex">1</td><td class="hex">200000</td></tr>
<tr><td >reg_ddrc_mobile</td><td class="hex">22:22</td><td class="hex">400000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_clock_stop_en</td><td class="hex">23:23</td><td class="hex">800000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_read_latency</td><td class="hex">28:24</td><td class="hex">1f000000</td><td class="hex">7</td><td class="hex">7000000</td></tr>
<tr><td >reg_phy_mode_ddr1_ddr2</td><td class="hex">29:29</td><td class="hex">20000000</td><td class="hex">1</td><td class="hex">20000000</td></tr>
<tr><td >reg_ddrc_dis_pad_pd</td><td class="hex">30:30</td><td class="hex">40000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_loopback</td><td class="hex">31:31</td><td class="hex">80000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_param_reg3 @ 0XF8006020</td><td></td><td class="hex"><b>fffffffc</b></td><td></td><td class="hex"><b>272872d0</b></td></tr></table>
</li>
<li><p>Register : DRAM_param_reg4 @ 0XF8006024</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_en_2t_timing_mode</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_prefer_write</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_max_rank_rd</td><td class="hex">5:2</td><td class="hex">3c</td><td class="hex">f</td><td class="hex">3c</td></tr>
<tr><td >reg_ddrc_mr_wr</td><td class="hex">6:6</td><td class="hex">40</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_mr_addr</td><td class="hex">8:7</td><td class="hex">180</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_mr_data</td><td class="hex">24:9</td><td class="hex">1fffe00</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >ddrc_reg_mr_wr_busy</td><td class="hex">25:25</td><td class="hex">2000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_mr_type</td><td class="hex">26:26</td><td class="hex">4000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_mr_rdata_valid</td><td class="hex">27:27</td><td class="hex">8000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_param_reg4 @ 0XF8006024</td><td></td><td class="hex"><b>fffffff</b></td><td></td><td class="hex"><b>3c</b></td></tr></table>
</li>
<li><p>Register : DRAM_init_param @ 0XF8006028</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_final_wait_x32</td><td class="hex">6:0</td><td class="hex">7f</td><td class="hex">7</td><td class="hex">7</td></tr>
<tr><td >reg_ddrc_pre_ocd_x32</td><td class="hex">10:7</td><td class="hex">780</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_t_mrd</td><td class="hex">13:11</td><td class="hex">3800</td><td class="hex">4</td><td class="hex">2000</td></tr>
<tr><td><b>DRAM_init_param @ 0XF8006028</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>2007</b></td></tr></table>
</li>
<li><p>Register : DRAM_EMR_reg @ 0XF800602C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_emr2</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">8</td><td class="hex">8</td></tr>
<tr><td >reg_ddrc_emr3</td><td class="hex">31:16</td><td class="hex">ffff0000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_EMR_reg @ 0XF800602C</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>8</b></td></tr></table>
</li>
<li><p>Register : DRAM_EMR_MR_reg @ 0XF8006030</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_mr</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">930</td><td class="hex">930</td></tr>
<tr><td >reg_ddrc_emr</td><td class="hex">31:16</td><td class="hex">ffff0000</td><td class="hex">4</td><td class="hex">40000</td></tr>
<tr><td><b>DRAM_EMR_MR_reg @ 0XF8006030</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>40930</b></td></tr></table>
</li>
<li><p>Register : DRAM_burst8_rdwr @ 0XF8006034</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_burst_rdwr</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">4</td><td class="hex">4</td></tr>
<tr><td >reg_ddrc_pre_cke_x1024</td><td class="hex">13:4</td><td class="hex">3ff0</td><td class="hex">69</td><td class="hex">690</td></tr>
<tr><td >reg_ddrc_post_cke_x1024</td><td class="hex">25:16</td><td class="hex">3ff0000</td><td class="hex">1</td><td class="hex">10000</td></tr>
<tr><td >reg_ddrc_burstchop</td><td class="hex">28:28</td><td class="hex">10000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_burst8_rdwr @ 0XF8006034</td><td></td><td class="hex"><b>13ff3fff</b></td><td></td><td class="hex"><b>10694</b></td></tr></table>
</li>
<li><p>Register : DRAM_disable_DQ @ 0XF8006038</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_force_low_pri_n</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_dq</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_debug_mode</td><td class="hex">6:6</td><td class="hex">40</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_level_start</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_rd_level_start</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dq0_wait_t</td><td class="hex">12:9</td><td class="hex">1e00</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_disable_DQ @ 0XF8006038</td><td></td><td class="hex"><b>1fc3</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : DRAM_addr_map_bank @ 0XF800603C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_addrmap_bank_b0</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">7</td><td class="hex">7</td></tr>
<tr><td >reg_ddrc_addrmap_bank_b1</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">7</td><td class="hex">70</td></tr>
<tr><td >reg_ddrc_addrmap_bank_b2</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">7</td><td class="hex">700</td></tr>
<tr><td >reg_ddrc_addrmap_col_b5</td><td class="hex">15:12</td><td class="hex">f000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_col_b6</td><td class="hex">19:16</td><td class="hex">f0000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_addr_map_bank @ 0XF800603C</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>777</b></td></tr></table>
</li>
<li><p>Register : DRAM_addr_map_col @ 0XF8006040</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_addrmap_col_b2</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_col_b3</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_col_b4</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_col_b7</td><td class="hex">15:12</td><td class="hex">f000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_col_b8</td><td class="hex">19:16</td><td class="hex">f0000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_addrmap_col_b9</td><td class="hex">23:20</td><td class="hex">f00000</td><td class="hex">f</td><td class="hex">f00000</td></tr>
<tr><td >reg_ddrc_addrmap_col_b10</td><td class="hex">27:24</td><td class="hex">f000000</td><td class="hex">f</td><td class="hex">f000000</td></tr>
<tr><td >reg_ddrc_addrmap_col_b11</td><td class="hex">31:28</td><td class="hex">f0000000</td><td class="hex">f</td><td class="hex">f0000000</td></tr>
<tr><td><b>DRAM_addr_map_col @ 0XF8006040</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>fff00000</b></td></tr></table>
</li>
<li><p>Register : DRAM_addr_map_row @ 0XF8006044</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_addrmap_row_b0</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">6</td><td class="hex">6</td></tr>
<tr><td >reg_ddrc_addrmap_row_b1</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">6</td><td class="hex">60</td></tr>
<tr><td >reg_ddrc_addrmap_row_b2_11</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">6</td><td class="hex">600</td></tr>
<tr><td >reg_ddrc_addrmap_row_b12</td><td class="hex">15:12</td><td class="hex">f000</td><td class="hex">6</td><td class="hex">6000</td></tr>
<tr><td >reg_ddrc_addrmap_row_b13</td><td class="hex">19:16</td><td class="hex">f0000</td><td class="hex">6</td><td class="hex">60000</td></tr>
<tr><td >reg_ddrc_addrmap_row_b14</td><td class="hex">23:20</td><td class="hex">f00000</td><td class="hex">f</td><td class="hex">f00000</td></tr>
<tr><td >reg_ddrc_addrmap_row_b15</td><td class="hex">27:24</td><td class="hex">f000000</td><td class="hex">f</td><td class="hex">f000000</td></tr>
<tr><td><b>DRAM_addr_map_row @ 0XF8006044</td><td></td><td class="hex"><b>fffffff</b></td><td></td><td class="hex"><b>ff66666</b></td></tr></table>
</li>
<li><p>Register : DRAM_ODT_reg @ 0XF8006048</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_rank0_rd_odt</td><td class="hex">2:0</td><td class="hex">7</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rank0_wr_odt</td><td class="hex">5:3</td><td class="hex">38</td><td class="hex">1</td><td class="hex">8</td></tr>
<tr><td >reg_ddrc_rank1_rd_odt</td><td class="hex">8:6</td><td class="hex">1c0</td><td class="hex">1</td><td class="hex">40</td></tr>
<tr><td >reg_ddrc_rank1_wr_odt</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >reg_phy_rd_local_odt</td><td class="hex">13:12</td><td class="hex">3000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_local_odt</td><td class="hex">15:14</td><td class="hex">c000</td><td class="hex">3</td><td class="hex">c000</td></tr>
<tr><td >reg_phy_idle_local_odt</td><td class="hex">17:16</td><td class="hex">30000</td><td class="hex">3</td><td class="hex">30000</td></tr>
<tr><td >reg_ddrc_rank2_rd_odt</td><td class="hex">20:18</td><td class="hex">1c0000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rank2_wr_odt</td><td class="hex">23:21</td><td class="hex">e00000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rank3_rd_odt</td><td class="hex">26:24</td><td class="hex">7000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rank3_wr_odt</td><td class="hex">29:27</td><td class="hex">38000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DRAM_ODT_reg @ 0XF8006048</td><td></td><td class="hex"><b>3fffffff</b></td><td></td><td class="hex"><b>3c248</b></td></tr></table>
</li>
<li><p>Register : phy_cmd_timeout_rddata_cpt @ 0XF8006050</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_rd_cmd_to_data</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_cmd_to_data</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_rdc_we_to_re_delay</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">8</td><td class="hex">800</td></tr>
<tr><td >reg_phy_rdc_fifo_rst_disable</td><td class="hex">15:15</td><td class="hex">8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_use_fixed_re</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">1</td><td class="hex">10000</td></tr>
<tr><td >reg_phy_rdc_fifo_rst_err_cnt_clr</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dis_phy_ctrl_rstn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_clk_stall_level</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_num_of_dq0</td><td class="hex">27:24</td><td class="hex">f000000</td><td class="hex">7</td><td class="hex">7000000</td></tr>
<tr><td >reg_phy_wrlvl_num_of_dq0</td><td class="hex">31:28</td><td class="hex">f0000000</td><td class="hex">7</td><td class="hex">70000000</td></tr>
<tr><td><b>phy_cmd_timeout_rddata_cpt @ 0XF8006050</td><td></td><td class="hex"><b>ff0f8fff</b></td><td></td><td class="hex"><b>77010800</b></td></tr></table>
</li>
<li><p>Register : DLL_calib @ 0XF8006058</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_dll_calib_to_min_x1024</td><td class="hex">7:0</td><td class="hex">ff</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_ddrc_dll_calib_to_max_x1024</td><td class="hex">15:8</td><td class="hex">ff00</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >reg_ddrc_dis_dll_calib</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DLL_calib @ 0XF8006058</td><td></td><td class="hex"><b>1ffff</b></td><td></td><td class="hex"><b>101</b></td></tr></table>
</li>
<li><p>Register : ODT_delay_hold @ 0XF800605C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_rd_odt_delay</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">3</td><td class="hex">3</td></tr>
<tr><td >reg_ddrc_wr_odt_delay</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rd_odt_hold</td><td class="hex">11:8</td><td class="hex">f00</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_wr_odt_hold</td><td class="hex">15:12</td><td class="hex">f000</td><td class="hex">5</td><td class="hex">5000</td></tr>
<tr><td><b>ODT_delay_hold @ 0XF800605C</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>5003</b></td></tr></table>
</li>
<li><p>Register : ctrl_reg1 @ 0XF8006060</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_pageclose</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_lpr_num_entries</td><td class="hex">6:1</td><td class="hex">7e</td><td class="hex">1f</td><td class="hex">3e</td></tr>
<tr><td >reg_ddrc_auto_pre_en</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_refresh_update_level</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_wc</td><td class="hex">9:9</td><td class="hex">200</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_collision_page_opt</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_selfref_en</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>ctrl_reg1 @ 0XF8006060</td><td></td><td class="hex"><b>17ff</b></td><td></td><td class="hex"><b>3e</b></td></tr></table>
</li>
<li><p>Register : ctrl_reg2 @ 0XF8006064</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_go2critical_hysteresis</td><td class="hex">12:5</td><td class="hex">1fe0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_go2critical_en</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">1</td><td class="hex">20000</td></tr>
<tr><td><b>ctrl_reg2 @ 0XF8006064</td><td></td><td class="hex"><b>21fe0</b></td><td></td><td class="hex"><b>20000</b></td></tr></table>
</li>
<li><p>Register : ctrl_reg3 @ 0XF8006068</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_wrlvl_ww</td><td class="hex">7:0</td><td class="hex">ff</td><td class="hex">41</td><td class="hex">41</td></tr>
<tr><td >reg_ddrc_rdlvl_rr</td><td class="hex">15:8</td><td class="hex">ff00</td><td class="hex">41</td><td class="hex">4100</td></tr>
<tr><td >reg_ddrc_dfi_t_wlmrd</td><td class="hex">25:16</td><td class="hex">3ff0000</td><td class="hex">28</td><td class="hex">280000</td></tr>
<tr><td><b>ctrl_reg3 @ 0XF8006068</td><td></td><td class="hex"><b>3ffffff</b></td><td></td><td class="hex"><b>284141</b></td></tr></table>
</li>
<li><p>Register : ctrl_reg4 @ 0XF800606C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >dfi_t_ctrlupd_interval_min_x1024</td><td class="hex">7:0</td><td class="hex">ff</td><td class="hex">10</td><td class="hex">10</td></tr>
<tr><td >dfi_t_ctrlupd_interval_max_x1024</td><td class="hex">15:8</td><td class="hex">ff00</td><td class="hex">16</td><td class="hex">1600</td></tr>
<tr><td><b>ctrl_reg4 @ 0XF800606C</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>1610</b></td></tr></table>
</li>
<li><p>Register : CHE_REFRESH_TIMER01 @ 0XF80060A0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >refresh_timer0_start_value_x32</td><td class="hex">11:0</td><td class="hex">fff</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >refresh_timer1_start_value_x32</td><td class="hex">23:12</td><td class="hex">fff000</td><td class="hex">8</td><td class="hex">8000</td></tr>
<tr><td><b>CHE_REFRESH_TIMER01 @ 0XF80060A0</td><td></td><td class="hex"><b>ffffff</b></td><td></td><td class="hex"><b>8000</b></td></tr></table>
</li>
<li><p>Register : CHE_T_ZQ @ 0XF80060A4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_dis_auto_zq</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_ddr3</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >reg_ddrc_t_mod</td><td class="hex">11:2</td><td class="hex">ffc</td><td class="hex">200</td><td class="hex">800</td></tr>
<tr><td >reg_ddrc_t_zq_long_nop</td><td class="hex">21:12</td><td class="hex">3ff000</td><td class="hex">200</td><td class="hex">200000</td></tr>
<tr><td >reg_ddrc_t_zq_short_nop</td><td class="hex">31:22</td><td class="hex">ffc00000</td><td class="hex">40</td><td class="hex">10000000</td></tr>
<tr><td><b>CHE_T_ZQ @ 0XF80060A4</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>10200802</b></td></tr></table>
</li>
<li><p>Register : CHE_T_ZQ_Short_Interval_Reg @ 0XF80060A8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >t_zq_short_interval_x1024</td><td class="hex">19:0</td><td class="hex">fffff</td><td class="hex">cb73</td><td class="hex">cb73</td></tr>
<tr><td >dram_rstn_x1024</td><td class="hex">27:20</td><td class="hex">ff00000</td><td class="hex">69</td><td class="hex">6900000</td></tr>
<tr><td><b>CHE_T_ZQ_Short_Interval_Reg @ 0XF80060A8</td><td></td><td class="hex"><b>fffffff</b></td><td></td><td class="hex"><b>690cb73</b></td></tr></table>
</li>
<li><p>Register : deep_pwrdwn_reg @ 0XF80060AC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >deeppowerdown_en</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >deeppowerdown_to_x1024</td><td class="hex">8:1</td><td class="hex">1fe</td><td class="hex">ff</td><td class="hex">1fe</td></tr>
<tr><td><b>deep_pwrdwn_reg @ 0XF80060AC</td><td></td><td class="hex"><b>1ff</b></td><td></td><td class="hex"><b>1fe</b></td></tr></table>
</li>
<li><p>Register : reg_2c @ 0XF80060B0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >dfi_wrlvl_max_x1024</td><td class="hex">11:0</td><td class="hex">fff</td><td class="hex">fff</td><td class="hex">fff</td></tr>
<tr><td >dfi_rdlvl_max_x1024</td><td class="hex">23:12</td><td class="hex">fff000</td><td class="hex">fff</td><td class="hex">fff000</td></tr>
<tr><td >ddrc_reg_twrlvl_max_error</td><td class="hex">24:24</td><td class="hex">1000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >ddrc_reg_trdlvl_max_error</td><td class="hex">25:25</td><td class="hex">2000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dfi_wr_level_en</td><td class="hex">26:26</td><td class="hex">4000000</td><td class="hex">1</td><td class="hex">4000000</td></tr>
<tr><td >reg_ddrc_dfi_rd_dqs_gate_level</td><td class="hex">27:27</td><td class="hex">8000000</td><td class="hex">1</td><td class="hex">8000000</td></tr>
<tr><td >reg_ddrc_dfi_rd_data_eye_train</td><td class="hex">28:28</td><td class="hex">10000000</td><td class="hex">1</td><td class="hex">10000000</td></tr>
<tr><td><b>reg_2c @ 0XF80060B0</td><td></td><td class="hex"><b>1fffffff</b></td><td></td><td class="hex"><b>1cffffff</b></td></tr></table>
</li>
<li><p>Register : reg_2d @ 0XF80060B4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_2t_delay</td><td class="hex">8:0</td><td class="hex">1ff</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_skip_ocd</td><td class="hex">9:9</td><td class="hex">200</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >reg_ddrc_dis_pre_bypass</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>reg_2d @ 0XF80060B4</td><td></td><td class="hex"><b>7ff</b></td><td></td><td class="hex"><b>200</b></td></tr></table>
</li>
<li><p>Register : dfi_timing @ 0XF80060B8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_dfi_t_rddata_en</td><td class="hex">4:0</td><td class="hex">1f</td><td class="hex">6</td><td class="hex">6</td></tr>
<tr><td >reg_ddrc_dfi_t_ctrlup_min</td><td class="hex">14:5</td><td class="hex">7fe0</td><td class="hex">3</td><td class="hex">60</td></tr>
<tr><td >reg_ddrc_dfi_t_ctrlup_max</td><td class="hex">24:15</td><td class="hex">1ff8000</td><td class="hex">40</td><td class="hex">200000</td></tr>
<tr><td><b>dfi_timing @ 0XF80060B8</td><td></td><td class="hex"><b>1ffffff</b></td><td></td><td class="hex"><b>200066</b></td></tr></table>
</li>
<li><p>Register : refresh_timer_2 @ 0XF80060BC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_refresh_timer2_start_value_x32</td><td class="hex">11:0</td><td class="hex">fff</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_refresh_timer3_start_value_x32</td><td class="hex">23:12</td><td class="hex">fff000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>refresh_timer_2 @ 0XF80060BC</td><td></td><td class="hex"><b>ffffff</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : CHE_ECC_CONTROL_REG_OFFSET @ 0XF80060C4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >Clear_Uncorrectable_DRAM_ECC_error</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Clear_Correctable_DRAM_ECC_error</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>CHE_ECC_CONTROL_REG_OFFSET @ 0XF80060C4</td><td></td><td class="hex"><b>3</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : CHE_CORR_ECC_LOG_REG_OFFSET @ 0XF80060C8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CORR_ECC_LOG_VALID</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >ECC_CORRECTED_BIT_NUM</td><td class="hex">7:1</td><td class="hex">fe</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>CHE_CORR_ECC_LOG_REG_OFFSET @ 0XF80060C8</td><td></td><td class="hex"><b>ff</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : CHE_UNCORR_ECC_LOG_REG_OFFSET @ 0XF80060DC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >UNCORR_ECC_LOG_VALID</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>CHE_UNCORR_ECC_LOG_REG_OFFSET @ 0XF80060DC</td><td></td><td class="hex"><b>1</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : CHE_ECC_STATS_REG_OFFSET @ 0XF80060F0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >STAT_NUM_CORR_ERR</td><td class="hex">15:8</td><td class="hex">ff00</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >STAT_NUM_UNCORR_ERR</td><td class="hex">7:0</td><td class="hex">ff</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>CHE_ECC_STATS_REG_OFFSET @ 0XF80060F0</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : ECC_scrub @ 0XF80060F4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_ecc_mode</td><td class="hex">2:0</td><td class="hex">7</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_scrub</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">1</td><td class="hex">8</td></tr>
<tr><td><b>ECC_scrub @ 0XF80060F4</td><td></td><td class="hex"><b>f</b></td><td></td><td class="hex"><b>8</b></td></tr></table>
</li>
<li><p>Register : phy_rcvr_enable @ 0XF8006114</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_dif_on</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dif_off</td><td class="hex">7:4</td><td class="hex">f0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_rcvr_enable @ 0XF8006114</td><td></td><td class="hex"><b>ff</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : PHY_Config0 @ 0XF8006118</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_data_slice_in_use</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_phy_rdlvl_inc_mode</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_inc_mode</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wrlvl_inc_mode</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_tx</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_rx</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_shift_dq</td><td class="hex">14:6</td><td class="hex">7fc0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_err_clr</td><td class="hex">23:15</td><td class="hex">ff8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dq_offset</td><td class="hex">30:24</td><td class="hex">7f000000</td><td class="hex">40</td><td class="hex">40000000</td></tr>
<tr><td><b>PHY_Config0 @ 0XF8006118</td><td></td><td class="hex"><b>7fffffff</b></td><td></td><td class="hex"><b>40000001</b></td></tr></table>
</li>
<li><p>Register : PHY_Config1 @ 0XF800611C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_data_slice_in_use</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_phy_rdlvl_inc_mode</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_inc_mode</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wrlvl_inc_mode</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_tx</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_rx</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_shift_dq</td><td class="hex">14:6</td><td class="hex">7fc0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_err_clr</td><td class="hex">23:15</td><td class="hex">ff8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dq_offset</td><td class="hex">30:24</td><td class="hex">7f000000</td><td class="hex">40</td><td class="hex">40000000</td></tr>
<tr><td><b>PHY_Config1 @ 0XF800611C</td><td></td><td class="hex"><b>7fffffff</b></td><td></td><td class="hex"><b>40000001</b></td></tr></table>
</li>
<li><p>Register : PHY_Config2 @ 0XF8006120</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_data_slice_in_use</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_phy_rdlvl_inc_mode</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_inc_mode</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wrlvl_inc_mode</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_tx</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_rx</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_shift_dq</td><td class="hex">14:6</td><td class="hex">7fc0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_err_clr</td><td class="hex">23:15</td><td class="hex">ff8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dq_offset</td><td class="hex">30:24</td><td class="hex">7f000000</td><td class="hex">40</td><td class="hex">40000000</td></tr>
<tr><td >reg_phy_data_slice_in_use</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_phy_rdlvl_inc_mode</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_inc_mode</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wrlvl_inc_mode</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_tx</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_rx</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_shift_dq</td><td class="hex">14:6</td><td class="hex">7fc0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_err_clr</td><td class="hex">23:15</td><td class="hex">ff8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dq_offset</td><td class="hex">30:24</td><td class="hex">7f000000</td><td class="hex">40</td><td class="hex">40000000</td></tr>
<tr><td><b>PHY_Config2 @ 0XF8006120</td><td></td><td class="hex"><b>7fffffff</b></td><td></td><td class="hex"><b>40000001</b></td></tr></table>
</li>
<li><p>Register : PHY_Config3 @ 0XF8006124</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_data_slice_in_use</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_phy_rdlvl_inc_mode</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_inc_mode</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wrlvl_inc_mode</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_tx</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_board_lpbk_rx</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_shift_dq</td><td class="hex">14:6</td><td class="hex">7fc0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_err_clr</td><td class="hex">23:15</td><td class="hex">ff8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_dq_offset</td><td class="hex">30:24</td><td class="hex">7f000000</td><td class="hex">40</td><td class="hex">40000000</td></tr>
<tr><td><b>PHY_Config3 @ 0XF8006124</td><td></td><td class="hex"><b>7fffffff</b></td><td></td><td class="hex"><b>40000001</b></td></tr></table>
</li>
<li><p>Register : phy_init_ratio0 @ 0XF800612C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wrlvl_init_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3</td><td class="hex">3</td></tr>
<tr><td >reg_phy_gatelvl_init_ratio</td><td class="hex">19:10</td><td class="hex">ffc00</td><td class="hex">cf</td><td class="hex">33c00</td></tr>
<tr><td><b>phy_init_ratio0 @ 0XF800612C</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>33c03</b></td></tr></table>
</li>
<li><p>Register : phy_init_ratio1 @ 0XF8006130</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wrlvl_init_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3</td><td class="hex">3</td></tr>
<tr><td >reg_phy_gatelvl_init_ratio</td><td class="hex">19:10</td><td class="hex">ffc00</td><td class="hex">d0</td><td class="hex">34000</td></tr>
<tr><td><b>phy_init_ratio1 @ 0XF8006130</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>34003</b></td></tr></table>
</li>
<li><p>Register : phy_init_ratio2 @ 0XF8006134</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wrlvl_init_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_init_ratio</td><td class="hex">19:10</td><td class="hex">ffc00</td><td class="hex">bd</td><td class="hex">2f400</td></tr>
<tr><td><b>phy_init_ratio2 @ 0XF8006134</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>2f400</b></td></tr></table>
</li>
<li><p>Register : phy_init_ratio3 @ 0XF8006138</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wrlvl_init_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_gatelvl_init_ratio</td><td class="hex">19:10</td><td class="hex">ffc00</td><td class="hex">c1</td><td class="hex">30400</td></tr>
<tr><td><b>phy_init_ratio3 @ 0XF8006138</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>30400</b></td></tr></table>
</li>
<li><p>Register : phy_rd_dqs_cfg0 @ 0XF8006140</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_rd_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">35</td><td class="hex">35</td></tr>
<tr><td >reg_phy_rd_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_rd_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_rd_dqs_cfg0 @ 0XF8006140</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>35</b></td></tr></table>
</li>
<li><p>Register : phy_rd_dqs_cfg1 @ 0XF8006144</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_rd_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">35</td><td class="hex">35</td></tr>
<tr><td >reg_phy_rd_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_rd_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_rd_dqs_cfg1 @ 0XF8006144</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>35</b></td></tr></table>
</li>
<li><p>Register : phy_rd_dqs_cfg2 @ 0XF8006148</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_rd_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">35</td><td class="hex">35</td></tr>
<tr><td >reg_phy_rd_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_rd_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_rd_dqs_cfg2 @ 0XF8006148</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>35</b></td></tr></table>
</li>
<li><p>Register : phy_rd_dqs_cfg3 @ 0XF800614C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_rd_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">35</td><td class="hex">35</td></tr>
<tr><td >reg_phy_rd_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_rd_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_rd_dqs_cfg3 @ 0XF800614C</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>35</b></td></tr></table>
</li>
<li><p>Register : phy_wr_dqs_cfg0 @ 0XF8006154</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">83</td><td class="hex">83</td></tr>
<tr><td >reg_phy_wr_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_wr_dqs_cfg0 @ 0XF8006154</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>83</b></td></tr></table>
</li>
<li><p>Register : phy_wr_dqs_cfg1 @ 0XF8006158</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">83</td><td class="hex">83</td></tr>
<tr><td >reg_phy_wr_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_wr_dqs_cfg1 @ 0XF8006158</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>83</b></td></tr></table>
</li>
<li><p>Register : phy_wr_dqs_cfg2 @ 0XF800615C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">7f</td><td class="hex">7f</td></tr>
<tr><td >reg_phy_wr_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_wr_dqs_cfg2 @ 0XF800615C</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>7f</b></td></tr></table>
</li>
<li><p>Register : phy_wr_dqs_cfg3 @ 0XF8006160</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_dqs_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">78</td><td class="hex">78</td></tr>
<tr><td >reg_phy_wr_dqs_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_dqs_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_wr_dqs_cfg3 @ 0XF8006160</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>78</b></td></tr></table>
</li>
<li><p>Register : phy_we_cfg0 @ 0XF8006168</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_fifo_we_slave_ratio</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">124</td><td class="hex">124</td></tr>
<tr><td >reg_phy_fifo_we_in_force</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_fifo_we_in_delay</td><td class="hex">20:12</td><td class="hex">1ff000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_we_cfg0 @ 0XF8006168</td><td></td><td class="hex"><b>1fffff</b></td><td></td><td class="hex"><b>124</b></td></tr></table>
</li>
<li><p>Register : phy_we_cfg1 @ 0XF800616C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_fifo_we_slave_ratio</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">125</td><td class="hex">125</td></tr>
<tr><td >reg_phy_fifo_we_in_force</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_fifo_we_in_delay</td><td class="hex">20:12</td><td class="hex">1ff000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_we_cfg1 @ 0XF800616C</td><td></td><td class="hex"><b>1fffff</b></td><td></td><td class="hex"><b>125</b></td></tr></table>
</li>
<li><p>Register : phy_we_cfg2 @ 0XF8006170</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_fifo_we_slave_ratio</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">112</td><td class="hex">112</td></tr>
<tr><td >reg_phy_fifo_we_in_force</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_fifo_we_in_delay</td><td class="hex">20:12</td><td class="hex">1ff000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_we_cfg2 @ 0XF8006170</td><td></td><td class="hex"><b>1fffff</b></td><td></td><td class="hex"><b>112</b></td></tr></table>
</li>
<li><p>Register : phy_we_cfg3 @ 0XF8006174</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_fifo_we_slave_ratio</td><td class="hex">10:0</td><td class="hex">7ff</td><td class="hex">116</td><td class="hex">116</td></tr>
<tr><td >reg_phy_fifo_we_in_force</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_fifo_we_in_delay</td><td class="hex">20:12</td><td class="hex">1ff000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>phy_we_cfg3 @ 0XF8006174</td><td></td><td class="hex"><b>1fffff</b></td><td></td><td class="hex"><b>116</b></td></tr></table>
</li>
<li><p>Register : wr_data_slv0 @ 0XF800617C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_data_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">c3</td><td class="hex">c3</td></tr>
<tr><td >reg_phy_wr_data_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_data_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>wr_data_slv0 @ 0XF800617C</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>c3</b></td></tr></table>
</li>
<li><p>Register : wr_data_slv1 @ 0XF8006180</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_data_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">c3</td><td class="hex">c3</td></tr>
<tr><td >reg_phy_wr_data_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_data_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>wr_data_slv1 @ 0XF8006180</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>c3</b></td></tr></table>
</li>
<li><p>Register : wr_data_slv2 @ 0XF8006184</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_data_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">bf</td><td class="hex">bf</td></tr>
<tr><td >reg_phy_wr_data_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_data_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>wr_data_slv2 @ 0XF8006184</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>bf</b></td></tr></table>
</li>
<li><p>Register : wr_data_slv3 @ 0XF8006188</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_data_slave_ratio</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">b8</td><td class="hex">b8</td></tr>
<tr><td >reg_phy_wr_data_slave_force</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_wr_data_slave_delay</td><td class="hex">19:11</td><td class="hex">ff800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>wr_data_slv3 @ 0XF8006188</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>b8</b></td></tr></table>
</li>
<li><p>Register : reg_64 @ 0XF8006190</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_loopback</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bl2</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_at_spd_atpg</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_enable</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_force_err</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_bist_mode</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_invert_clkout</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">1</td><td class="hex">80</td></tr>
<tr><td >reg_phy_all_dq_mpr_rd_resp</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_sel_logic</td><td class="hex">9:9</td><td class="hex">200</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_ctrl_slave_ratio</td><td class="hex">19:10</td><td class="hex">ffc00</td><td class="hex">100</td><td class="hex">40000</td></tr>
<tr><td >reg_phy_ctrl_slave_force</td><td class="hex">20:20</td><td class="hex">100000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_ctrl_slave_delay</td><td class="hex">27:21</td><td class="hex">fe00000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_use_rank0_delays</td><td class="hex">28:28</td><td class="hex">10000000</td><td class="hex">1</td><td class="hex">10000000</td></tr>
<tr><td >reg_phy_lpddr</td><td class="hex">29:29</td><td class="hex">20000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_cmd_latency</td><td class="hex">30:30</td><td class="hex">40000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_int_lpbk</td><td class="hex">31:31</td><td class="hex">80000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>reg_64 @ 0XF8006190</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>10040080</b></td></tr></table>
</li>
<li><p>Register : reg_65 @ 0XF8006194</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_phy_wr_rl_delay</td><td class="hex">4:0</td><td class="hex">1f</td><td class="hex">2</td><td class="hex">2</td></tr>
<tr><td >reg_phy_rd_rl_delay</td><td class="hex">9:5</td><td class="hex">3e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >reg_phy_dll_lock_diff</td><td class="hex">13:10</td><td class="hex">3c00</td><td class="hex">f</td><td class="hex">3c00</td></tr>
<tr><td >reg_phy_use_wr_level</td><td class="hex">14:14</td><td class="hex">4000</td><td class="hex">1</td><td class="hex">4000</td></tr>
<tr><td >reg_phy_use_rd_dqs_gate_level</td><td class="hex">15:15</td><td class="hex">8000</td><td class="hex">1</td><td class="hex">8000</td></tr>
<tr><td >reg_phy_use_rd_data_eye_level</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">1</td><td class="hex">10000</td></tr>
<tr><td >reg_phy_dis_calib_rst</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_phy_ctrl_slave_delay</td><td class="hex">19:18</td><td class="hex">c0000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>reg_65 @ 0XF8006194</td><td></td><td class="hex"><b>fffff</b></td><td></td><td class="hex"><b>1fc82</b></td></tr></table>
</li>
<li><p>Register : page_mask @ 0XF8006204</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_page_addr_mask</td><td class="hex">31:0</td><td class="hex">0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>page_mask @ 0XF8006204</td><td></td><td class="hex"><b>0</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : axi_priority_wr_port0 @ 0XF8006208</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_wr_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_wr_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_wr_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_wr_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_rmw_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td><b>axi_priority_wr_port0 @ 0XF8006208</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>803ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_wr_port1 @ 0XF800620C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_wr_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_wr_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_wr_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_wr_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_rmw_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td><b>axi_priority_wr_port1 @ 0XF800620C</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>803ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_wr_port2 @ 0XF8006210</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_wr_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_wr_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_wr_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_wr_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_rmw_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td><b>axi_priority_wr_port2 @ 0XF8006210</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>803ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_wr_port3 @ 0XF8006214</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_wr_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_wr_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_wr_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_wr_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_rmw_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td><b>axi_priority_wr_port3 @ 0XF8006214</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>803ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_rd_port0 @ 0XF8006218</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_rd_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_rd_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_rd_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_rd_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_set_hpr_rd_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>axi_priority_rd_port0 @ 0XF8006218</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>3ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_rd_port1 @ 0XF800621C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_rd_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_rd_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_rd_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_rd_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_set_hpr_rd_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>axi_priority_rd_port1 @ 0XF800621C</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>3ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_rd_port2 @ 0XF8006220</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_rd_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_rd_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_rd_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_rd_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_set_hpr_rd_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>axi_priority_rd_port2 @ 0XF8006220</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>3ff</b></td></tr></table>
</li>
<li><p>Register : axi_priority_rd_port3 @ 0XF8006224</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_arb_pri_rd_portn</td><td class="hex">9:0</td><td class="hex">3ff</td><td class="hex">3ff</td><td class="hex">3ff</td></tr>
<tr><td >reg_arb_disable_aging_rd_portn</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_disable_urgent_rd_portn</td><td class="hex">17:17</td><td class="hex">20000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_dis_page_match_rd_portn</td><td class="hex">18:18</td><td class="hex">40000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_arb_set_hpr_rd_portn</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>axi_priority_rd_port3 @ 0XF8006224</td><td></td><td class="hex"><b>f03ff</b></td><td></td><td class="hex"><b>3ff</b></td></tr></table>
</li>
<li><p>Register : lpddr_ctrl0 @ 0XF80062A8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_lpddr2</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_per_bank_refresh</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_derate_enable</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_mr4_margin</td><td class="hex">11:4</td><td class="hex">ff0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>lpddr_ctrl0 @ 0XF80062A8</td><td></td><td class="hex"><b>ff7</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : lpddr_ctrl1 @ 0XF80062AC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_mr4_read_interval</td><td class="hex">31:0</td><td class="hex">0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>lpddr_ctrl1 @ 0XF80062AC</td><td></td><td class="hex"><b>0</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
<li><p>Register : lpddr_ctrl2 @ 0XF80062B0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_min_stable_clock_x1</td><td class="hex">3:0</td><td class="hex">f</td><td class="hex">5</td><td class="hex">5</td></tr>
<tr><td >reg_ddrc_idle_after_reset_x32</td><td class="hex">11:4</td><td class="hex">ff0</td><td class="hex">12</td><td class="hex">120</td></tr>
<tr><td >reg_ddrc_t_mrw</td><td class="hex">21:12</td><td class="hex">3ff000</td><td class="hex">5</td><td class="hex">5000</td></tr>
<tr><td><b>lpddr_ctrl2 @ 0XF80062B0</td><td></td><td class="hex"><b>3fffff</b></td><td></td><td class="hex"><b>5125</b></td></tr></table>
</li>
<li><p>Register : lpddr_ctrl3 @ 0XF80062B4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_max_auto_init_x1024</td><td class="hex">7:0</td><td class="hex">ff</td><td class="hex">a8</td><td class="hex">a8</td></tr>
<tr><td >reg_ddrc_dev_zqinit_x32</td><td class="hex">17:8</td><td class="hex">3ff00</td><td class="hex">12</td><td class="hex">1200</td></tr>
<tr><td><b>lpddr_ctrl3 @ 0XF80062B4</td><td></td><td class="hex"><b>3ffff</b></td><td></td><td class="hex"><b>12a8</b></td></tr></table>
</li>
<h2>POLL ON DCI STATUS</h2>
<ul>
<p>POLL ON DCI STATUS</p>
<li><p>Register : DDRIOB_DCI_STATUS @ 0XF8000B74</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DONE</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">1</td><td class="hex">2000</td></tr>
<tr><td><b>DDRIOB_DCI_STATUS @ 0XF8000B74</td><td></td><td class="hex"><b>2000</b></td><td></td><td class="hex"><b>2000</b></td></tr></table>
</li>
</ul>
<h2>UNLOCK DDR</h2>
<ul>
<p>UNLOCK DDR</p>
<li><p>Register : ddrc_ctrl @ 0XF8006000</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >reg_ddrc_soft_rstb</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >reg_ddrc_powerdown_en</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_data_bus_width</td><td class="hex">3:2</td><td class="hex">c</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_burst8_refresh</td><td class="hex">6:4</td><td class="hex">70</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_rdwr_idle_gap</td><td class="hex">13:7</td><td class="hex">3f80</td><td class="hex">1</td><td class="hex">80</td></tr>
<tr><td >reg_ddrc_dis_rd_bypass</td><td class="hex">14:14</td><td class="hex">4000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_act_bypass</td><td class="hex">15:15</td><td class="hex">8000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >reg_ddrc_dis_auto_refresh</td><td class="hex">16:16</td><td class="hex">10000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>ddrc_ctrl @ 0XF8006000</td><td></td><td class="hex"><b>1ffff</b></td><td></td><td class="hex"><b>81</b></td></tr></table>
</li>
</ul>
<h2>CHECK DDR STATUS</h2>
<ul>
<p>CHECK DDR STATUS</p>
<li><p>Register : mode_sts_reg @ 0XF8006054</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >ddrc_reg_operating_mode</td><td class="hex">2:0</td><td class="hex">7</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>mode_sts_reg @ 0XF8006054</td><td></td><td class="hex"><b>7</b></td><td></td><td class="hex"><b>1</b></td></tr></table>
</li>
</ul>
</ul>
</ul>
<hr/>
<h1><a name="ps7_mio_init_data">ps7_mio_init_data</a></h1>
<ul>
<h2>SLCR SETTINGS</h2>
<ul>
<p>SLCR SETTINGS</p>
<li><p>Register : SLCR_UNLOCK @ 0XF8000008</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >UNLOCK_KEY</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">df0d</td><td class="hex">df0d</td></tr>
<tr><td><b>SLCR_UNLOCK @ 0XF8000008</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>df0d</b></td></tr></table>
</li>
</ul>
<h2>OCM REMAPPING</h2>
<ul>
<p>OCM REMAPPING</p>
</ul>
<h2>DDRIOB SETTINGS</h2>
<ul>
<p>DDRIOB SETTINGS</p>
<li><p>Register : DDRIOB_ADDR0 @ 0XF8000B40</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_ADDR0 @ 0XF8000B40</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_ADDR1 @ 0XF8000B44</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_ADDR1 @ 0XF8000B44</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DATA0 @ 0XF8000B48</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">3</td><td class="hex">60</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DATA0 @ 0XF8000B48</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>672</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DATA1 @ 0XF8000B4C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">3</td><td class="hex">60</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DATA1 @ 0XF8000B4C</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>672</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DIFF0 @ 0XF8000B50</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">2</td><td class="hex">4</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">3</td><td class="hex">60</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DIFF0 @ 0XF8000B50</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>674</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DIFF1 @ 0XF8000B54</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">2</td><td class="hex">4</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">3</td><td class="hex">60</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DIFF1 @ 0XF8000B54</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>674</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_CLOCK @ 0XF8000B58</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >INP_POWER</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INP_TYPE</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DCI_UPDATE</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_EN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DCR_TYPE</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IBUF_DISABLE_MODE</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TERM_DISABLE_MODE</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >OUTPUT_EN</td><td class="hex">10:9</td><td class="hex">600</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP_EN</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_CLOCK @ 0XF8000B58</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DRIVE_SLEW_ADDR @ 0XF8000B5C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DRIVE_P</td><td class="hex">6:0</td><td class="hex">7f</td><td class="hex">1c</td><td class="hex">1c</td></tr>
<tr><td >DRIVE_N</td><td class="hex">13:7</td><td class="hex">3f80</td><td class="hex">c</td><td class="hex">600</td></tr>
<tr><td >SLEW_P</td><td class="hex">18:14</td><td class="hex">7c000</td><td class="hex">1a</td><td class="hex">68000</td></tr>
<tr><td >SLEW_N</td><td class="hex">23:19</td><td class="hex">f80000</td><td class="hex">1a</td><td class="hex">d00000</td></tr>
<tr><td >GTL</td><td class="hex">26:24</td><td class="hex">7000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >RTERM</td><td class="hex">31:27</td><td class="hex">f8000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DRIVE_SLEW_ADDR @ 0XF8000B5C</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>d6861c</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DRIVE_SLEW_DATA @ 0XF8000B60</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DRIVE_P</td><td class="hex">6:0</td><td class="hex">7f</td><td class="hex">1c</td><td class="hex">1c</td></tr>
<tr><td >DRIVE_N</td><td class="hex">13:7</td><td class="hex">3f80</td><td class="hex">c</td><td class="hex">600</td></tr>
<tr><td >SLEW_P</td><td class="hex">18:14</td><td class="hex">7c000</td><td class="hex">6</td><td class="hex">18000</td></tr>
<tr><td >SLEW_N</td><td class="hex">23:19</td><td class="hex">f80000</td><td class="hex">1f</td><td class="hex">f80000</td></tr>
<tr><td >GTL</td><td class="hex">26:24</td><td class="hex">7000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >RTERM</td><td class="hex">31:27</td><td class="hex">f8000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DRIVE_SLEW_DATA @ 0XF8000B60</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>f9861c</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DRIVE_SLEW_DIFF @ 0XF8000B64</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DRIVE_P</td><td class="hex">6:0</td><td class="hex">7f</td><td class="hex">1c</td><td class="hex">1c</td></tr>
<tr><td >DRIVE_N</td><td class="hex">13:7</td><td class="hex">3f80</td><td class="hex">c</td><td class="hex">600</td></tr>
<tr><td >SLEW_P</td><td class="hex">18:14</td><td class="hex">7c000</td><td class="hex">6</td><td class="hex">18000</td></tr>
<tr><td >SLEW_N</td><td class="hex">23:19</td><td class="hex">f80000</td><td class="hex">1f</td><td class="hex">f80000</td></tr>
<tr><td >GTL</td><td class="hex">26:24</td><td class="hex">7000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >RTERM</td><td class="hex">31:27</td><td class="hex">f8000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DRIVE_SLEW_DIFF @ 0XF8000B64</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>f9861c</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DRIVE_SLEW_CLOCK @ 0XF8000B68</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >DRIVE_P</td><td class="hex">6:0</td><td class="hex">7f</td><td class="hex">1c</td><td class="hex">1c</td></tr>
<tr><td >DRIVE_N</td><td class="hex">13:7</td><td class="hex">3f80</td><td class="hex">c</td><td class="hex">600</td></tr>
<tr><td >SLEW_P</td><td class="hex">18:14</td><td class="hex">7c000</td><td class="hex">1a</td><td class="hex">68000</td></tr>
<tr><td >SLEW_N</td><td class="hex">23:19</td><td class="hex">f80000</td><td class="hex">1a</td><td class="hex">d00000</td></tr>
<tr><td >GTL</td><td class="hex">26:24</td><td class="hex">7000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >RTERM</td><td class="hex">31:27</td><td class="hex">f8000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DRIVE_SLEW_CLOCK @ 0XF8000B68</td><td></td><td class="hex"><b>ffffffff</b></td><td></td><td class="hex"><b>d6861c</b></td></tr></table>
</li>
<li><p>Register : DDRIOB_DDR_CTRL @ 0XF8000B6C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >VREF_INT_EN</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >VREF_SEL</td><td class="hex">4:1</td><td class="hex">1e</td><td class="hex">4</td><td class="hex">8</td></tr>
<tr><td >VREF_EXT_EN</td><td class="hex">6:5</td><td class="hex">60</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >VREF_PULLUP_EN</td><td class="hex">8:7</td><td class="hex">180</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >REFIO_EN</td><td class="hex">9:9</td><td class="hex">200</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >REFIO_TEST</td><td class="hex">11:10</td><td class="hex">c00</td><td class="hex">3</td><td class="hex">c00</td></tr>
<tr><td >REFIO_PULLUP_EN</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DRST_B_PULLUP_EN</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >CKE_PULLUP_EN</td><td class="hex">14:14</td><td class="hex">4000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DDR_CTRL @ 0XF8000B6C</td><td></td><td class="hex"><b>7fff</b></td><td></td><td class="hex"><b>e09</b></td></tr></table>
</li>
<h2>ASSERT RESET</h2>
<ul>
<p>ASSERT RESET</p>
<li><p>Register : DDRIOB_DCI_CTRL @ 0XF8000B70</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >VRN_OUT</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">1</td><td class="hex">20</td></tr>
<tr><td><b>DDRIOB_DCI_CTRL @ 0XF8000B70</td><td></td><td class="hex"><b>21</b></td><td></td><td class="hex"><b>21</b></td></tr></table>
</li>
</ul>
<h2>DEASSERT RESET</h2>
<ul>
<p>DEASSERT RESET</p>
<li><p>Register : DDRIOB_DCI_CTRL @ 0XF8000B70</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >VRN_OUT</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">1</td><td class="hex">20</td></tr>
<tr><td><b>DDRIOB_DCI_CTRL @ 0XF8000B70</td><td></td><td class="hex"><b>21</b></td><td></td><td class="hex"><b>20</b></td></tr></table>
</li>
</ul>
<li><p>Register : DDRIOB_DCI_CTRL @ 0XF8000B70</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >RESET</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >ENABLE</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >VRP_TRI</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >VRN_TRI</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >VRP_OUT</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >VRN_OUT</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">1</td><td class="hex">20</td></tr>
<tr><td >NREF_OPT1</td><td class="hex">7:6</td><td class="hex">c0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >NREF_OPT2</td><td class="hex">10:8</td><td class="hex">700</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >NREF_OPT4</td><td class="hex">13:11</td><td class="hex">3800</td><td class="hex">1</td><td class="hex">800</td></tr>
<tr><td >PREF_OPT1</td><td class="hex">16:14</td><td class="hex">1c000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >PREF_OPT2</td><td class="hex">19:17</td><td class="hex">e0000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >UPDATE_CONTROL</td><td class="hex">20:20</td><td class="hex">100000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INIT_COMPLETE</td><td class="hex">21:21</td><td class="hex">200000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TST_CLK</td><td class="hex">22:22</td><td class="hex">400000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TST_HLN</td><td class="hex">23:23</td><td class="hex">800000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TST_HLP</td><td class="hex">24:24</td><td class="hex">1000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TST_RST</td><td class="hex">25:25</td><td class="hex">2000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >INT_DCI_EN</td><td class="hex">26:26</td><td class="hex">4000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>DDRIOB_DCI_CTRL @ 0XF8000B70</td><td></td><td class="hex"><b>7ffffff</b></td><td></td><td class="hex"><b>823</b></td></tr></table>
</li>
</ul>
<h2>MIO PROGRAMMING</h2>
<ul>
<p>MIO PROGRAMMING</p>
<li><p>Register : MIO_PIN_00 @ 0XF8000700</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_00 @ 0XF8000700</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_01 @ 0XF8000704</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_01 @ 0XF8000704</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_02 @ 0XF8000708</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_02 @ 0XF8000708</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_03 @ 0XF800070C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_03 @ 0XF800070C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_04 @ 0XF8000710</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_04 @ 0XF8000710</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_05 @ 0XF8000714</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_05 @ 0XF8000714</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_06 @ 0XF8000718</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_06 @ 0XF8000718</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_07 @ 0XF800071C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_07 @ 0XF800071C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_08 @ 0XF8000720</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_08 @ 0XF8000720</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>702</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_09 @ 0XF8000724</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_09 @ 0XF8000724</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_10 @ 0XF8000728</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_10 @ 0XF8000728</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_11 @ 0XF800072C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_11 @ 0XF800072C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_12 @ 0XF8000730</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_12 @ 0XF8000730</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_13 @ 0XF8000734</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_13 @ 0XF8000734</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_14 @ 0XF8000738</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_14 @ 0XF8000738</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_15 @ 0XF800073C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">3</td><td class="hex">600</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_15 @ 0XF800073C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>600</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_16 @ 0XF8000740</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_16 @ 0XF8000740</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>302</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_17 @ 0XF8000744</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_17 @ 0XF8000744</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>302</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_18 @ 0XF8000748</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_18 @ 0XF8000748</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>302</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_19 @ 0XF800074C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_19 @ 0XF800074C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>302</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_20 @ 0XF8000750</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_20 @ 0XF8000750</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>302</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_21 @ 0XF8000754</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_21 @ 0XF8000754</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>302</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_22 @ 0XF8000758</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_22 @ 0XF8000758</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>303</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_23 @ 0XF800075C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_23 @ 0XF800075C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>303</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_24 @ 0XF8000760</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_24 @ 0XF8000760</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>303</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_25 @ 0XF8000764</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_25 @ 0XF8000764</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>303</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_26 @ 0XF8000768</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_26 @ 0XF8000768</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>303</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_27 @ 0XF800076C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_27 @ 0XF800076C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>303</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_28 @ 0XF8000770</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_28 @ 0XF8000770</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_29 @ 0XF8000774</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_29 @ 0XF8000774</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>305</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_30 @ 0XF8000778</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_30 @ 0XF8000778</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_31 @ 0XF800077C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_31 @ 0XF800077C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>305</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_32 @ 0XF8000780</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_32 @ 0XF8000780</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_33 @ 0XF8000784</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_33 @ 0XF8000784</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_34 @ 0XF8000788</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_34 @ 0XF8000788</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_35 @ 0XF800078C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_35 @ 0XF800078C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_36 @ 0XF8000790</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_36 @ 0XF8000790</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>305</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_37 @ 0XF8000794</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_37 @ 0XF8000794</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_38 @ 0XF8000798</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_38 @ 0XF8000798</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_39 @ 0XF800079C</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_39 @ 0XF800079C</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>304</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_40 @ 0XF80007A0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_40 @ 0XF80007A0</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>380</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_41 @ 0XF80007A4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_41 @ 0XF80007A4</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>380</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_42 @ 0XF80007A8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_42 @ 0XF80007A8</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>380</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_43 @ 0XF80007AC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_43 @ 0XF80007AC</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>380</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_44 @ 0XF80007B0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_44 @ 0XF80007B0</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>380</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_45 @ 0XF80007B4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">1</td><td class="hex">100</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_45 @ 0XF80007B4</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>380</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_46 @ 0XF80007B8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_46 @ 0XF80007B8</td><td></td><td class="hex"><b>3f01</b></td><td></td><td class="hex"><b>201</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_47 @ 0XF80007BC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_47 @ 0XF80007BC</td><td></td><td class="hex"><b>3f01</b></td><td></td><td class="hex"><b>201</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_48 @ 0XF80007C0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">7</td><td class="hex">e0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_48 @ 0XF80007C0</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>2e0</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_49 @ 0XF80007C4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">7</td><td class="hex">e0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_49 @ 0XF80007C4</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>2e1</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_50 @ 0XF80007C8</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_50 @ 0XF80007C8</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>201</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_51 @ 0XF80007CC</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_51 @ 0XF80007CC</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>201</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_52 @ 0XF80007D0</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_52 @ 0XF80007D0</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>280</b></td></tr></table>
</li>
<li><p>Register : MIO_PIN_53 @ 0XF80007D4</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >TRI_ENABLE</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L0_SEL</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L1_SEL</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L2_SEL</td><td class="hex">4:3</td><td class="hex">18</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >L3_SEL</td><td class="hex">7:5</td><td class="hex">e0</td><td class="hex">4</td><td class="hex">80</td></tr>
<tr><td >Speed</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >IO_Type</td><td class="hex">11:9</td><td class="hex">e00</td><td class="hex">1</td><td class="hex">200</td></tr>
<tr><td >PULLUP</td><td class="hex">12:12</td><td class="hex">1000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >DisableRcvr</td><td class="hex">13:13</td><td class="hex">2000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>MIO_PIN_53 @ 0XF80007D4</td><td></td><td class="hex"><b>3fff</b></td><td></td><td class="hex"><b>280</b></td></tr></table>
</li>
<li><p>Register : SD0_WP_CD_SEL @ 0XF8000830</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >SDIO0_WP_SEL</td><td class="hex">5:0</td><td class="hex">3f</td><td class="hex">2e</td><td class="hex">2e</td></tr>
<tr><td >SDIO0_CD_SEL</td><td class="hex">21:16</td><td class="hex">3f0000</td><td class="hex">2f</td><td class="hex">2f0000</td></tr>
<tr><td><b>SD0_WP_CD_SEL @ 0XF8000830</td><td></td><td class="hex"><b>3f003f</b></td><td></td><td class="hex"><b>2f002e</b></td></tr></table>
</li>
</ul>
<h2>LOCK IT BACK</h2>
<ul>
<p>LOCK IT BACK</p>
<li><p>Register : SLCR_LOCK @ 0XF8000004</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >LOCK_KEY</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">767b</td><td class="hex">767b</td></tr>
<tr><td><b>SLCR_LOCK @ 0XF8000004</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>767b</b></td></tr></table>
</li>
</ul>
</ul>
<hr/>
<h1><a name="ps7_peripherals_init_data">ps7_peripherals_init_data</a></h1>
<ul>
<h2>UART REGISTERS</h2>
<ul>
<p>UART REGISTERS</p>
<li><p>Register : Baud_rate_divider_reg0 @ 0XE0001034</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >BDIV</td><td class="hex">7:0</td><td class="hex">ff</td><td class="hex">6</td><td class="hex">6</td></tr>
<tr><td><b>Baud_rate_divider_reg0 @ 0XE0001034</td><td></td><td class="hex"><b>ff</b></td><td></td><td class="hex"><b>6</b></td></tr></table>
</li>
<li><p>Register : Baud_rate_gen_reg0 @ 0XE0001018</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >CD</td><td class="hex">15:0</td><td class="hex">ffff</td><td class="hex">3e</td><td class="hex">3e</td></tr>
<tr><td><b>Baud_rate_gen_reg0 @ 0XE0001018</td><td></td><td class="hex"><b>ffff</b></td><td></td><td class="hex"><b>3e</b></td></tr></table>
</li>
<li><p>Register : Control_reg0 @ 0XE0001000</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >STPBRK</td><td class="hex">8:8</td><td class="hex">100</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >STTBRK</td><td class="hex">7:7</td><td class="hex">80</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >RSTTO</td><td class="hex">6:6</td><td class="hex">40</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TXDIS</td><td class="hex">5:5</td><td class="hex">20</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >TXEN</td><td class="hex">4:4</td><td class="hex">10</td><td class="hex">1</td><td class="hex">10</td></tr>
<tr><td >RXDIS</td><td class="hex">3:3</td><td class="hex">8</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >RXEN</td><td class="hex">2:2</td><td class="hex">4</td><td class="hex">1</td><td class="hex">4</td></tr>
<tr><td >TXRES</td><td class="hex">1:1</td><td class="hex">2</td><td class="hex">1</td><td class="hex">2</td></tr>
<tr><td >RXRES</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">1</td><td class="hex">1</td></tr>
<tr><td><b>Control_reg0 @ 0XE0001000</td><td></td><td class="hex"><b>1ff</b></td><td></td><td class="hex"><b>17</b></td></tr></table>
</li>
<li><p>Register : mode_reg0 @ 0XE0001004</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >IRMODE</td><td class="hex">11:11</td><td class="hex">800</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >UCLKEN</td><td class="hex">10:10</td><td class="hex">400</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >CHMODE</td><td class="hex">9:8</td><td class="hex">300</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >NBSTOP</td><td class="hex">7:6</td><td class="hex">c0</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >PAR</td><td class="hex">5:3</td><td class="hex">38</td><td class="hex">4</td><td class="hex">20</td></tr>
<tr><td >CHRL</td><td class="hex">2:1</td><td class="hex">6</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td >CLKS</td><td class="hex">0:0</td><td class="hex">1</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>mode_reg0 @ 0XE0001004</td><td></td><td class="hex"><b>fff</b></td><td></td><td class="hex"><b>20</b></td></tr></table>
</li>
</ul>
<h2>AFI REGISTERS</h2>
<ul>
<p>AFI REGISTERS</p>
<h2>AFI0 REGISTERS</h2>
<ul>
<p>AFI0 REGISTERS</p>
</ul>
<h2>AFI1 REGISTERS</h2>
<ul>
<p>AFI1 REGISTERS</p>
</ul>
<h2>AFI2 REGISTERS</h2>
<ul>
<p>AFI2 REGISTERS</p>
</ul>
<h2>AFI3 REGISTERS</h2>
<ul>
<p>AFI3 REGISTERS</p>
</ul>
</ul>
<h2>QSPI REGISTERS</h2>
<ul>
<p>QSPI REGISTERS</p>
<li><p>Register : Config_reg @ 0XE000D000</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >Holdb_dr</td><td class="hex">19:19</td><td class="hex">80000</td><td class="hex">1</td><td class="hex">80000</td></tr>
<tr><td><b>Config_reg @ 0XE000D000</td><td></td><td class="hex"><b>80000</b></td><td></td><td class="hex"><b>80000</b></td></tr></table>
</li>
</ul>
<h2>PL POWER ON RESET REGISTERS</h2>
<ul>
<p>PL POWER ON RESET REGISTERS</p>
<li><p>Register : CTRL @ 0XF8007000</p>
<table border="1"> 
<tr><thead><th>Bitfield</th><th>Bits</th><th>Mask</th><th>Value</th><th>Shifted Value</th></thead></tr><tbody>
<tr><td >PCFG_POR_CNT_4K</td><td class="hex">29:29</td><td class="hex">20000000</td><td class="hex">0</td><td class="hex">0</td></tr>
<tr><td><b>CTRL @ 0XF8007000</td><td></td><td class="hex"><b>20000000</b></td><td></td><td class="hex"><b>0</b></td></tr></table>
</li>
</ul>
<h2>SMC TIMING CALCULATION REGISTER UPDATE</h2>
<ul>
<p>SMC TIMING CALCULATION REGISTER UPDATE</p>
<h2>NAND SET CYCLE</h2>
<ul>
<p>NAND SET CYCLE</p>
</ul>
<h2>OPMODE</h2>
<ul>
<p>OPMODE</p>
</ul>
<h2>DIRECT COMMAND</h2>
<ul>
<p>DIRECT COMMAND</p>
</ul>
<h2>SRAM/NOR CS0 SET CYCLE</h2>
<ul>
<p>SRAM/NOR CS0 SET CYCLE</p>
</ul>
<h2>DIRECT COMMAND</h2>
<ul>
<p>DIRECT COMMAND</p>
</ul>
<h2>NOR CS0 BASE ADDRESS</h2>
<ul>
<p>NOR CS0 BASE ADDRESS</p>
</ul>
<h2>SRAM/NOR CS1 SET CYCLE</h2>
<ul>
<p>SRAM/NOR CS1 SET CYCLE</p>
</ul>
<h2>DIRECT COMMAND</h2>
<ul>
<p>DIRECT COMMAND</p>
</ul>
<h2>NOR CS1 BASE ADDRESS</h2>
<ul>
<p>NOR CS1 BASE ADDRESS</p>
</ul>
<h2>USB RESET</h2>
<ul>
<p>USB RESET</p>
<h2>DIR MODE BANK 0</h2>
<ul>
<p>DIR MODE BANK 0</p>
</ul>
<h2>DIR MODE BANK 1</h2>
<ul>
<p>DIR MODE BANK 1</p>
</ul>
<h2>MASK_DATA_0_LSW HIGH BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW HIGH BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW HIGH BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW HIGH BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW HIGH BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW HIGH BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW HIGH BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW HIGH BANK [53:48]</p>
</ul>
<h2>OUTPUT ENABLE BANK 0</h2>
<ul>
<p>OUTPUT ENABLE BANK 0</p>
</ul>
<h2>OUTPUT ENABLE BANK 1</h2>
<ul>
<p>OUTPUT ENABLE BANK 1</p>
</ul>
<h2>MASK_DATA_0_LSW LOW BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW LOW BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW LOW BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW LOW BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW LOW BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW LOW BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW LOW BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW LOW BANK [53:48]</p>
</ul>
<h2>MASK_DATA_0_LSW HIGH BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW HIGH BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW HIGH BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW HIGH BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW HIGH BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW HIGH BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW HIGH BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW HIGH BANK [53:48]</p>
</ul>
</ul>
<h2>ENET RESET</h2>
<ul>
<p>ENET RESET</p>
<h2>DIR MODE BANK 0</h2>
<ul>
<p>DIR MODE BANK 0</p>
</ul>
<h2>DIR MODE BANK 1</h2>
<ul>
<p>DIR MODE BANK 1</p>
</ul>
<h2>MASK_DATA_0_LSW HIGH BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW HIGH BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW HIGH BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW HIGH BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW HIGH BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW HIGH BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW HIGH BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW HIGH BANK [53:48]</p>
</ul>
<h2>OUTPUT ENABLE BANK 0</h2>
<ul>
<p>OUTPUT ENABLE BANK 0</p>
</ul>
<h2>OUTPUT ENABLE BANK 1</h2>
<ul>
<p>OUTPUT ENABLE BANK 1</p>
</ul>
<h2>MASK_DATA_0_LSW LOW BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW LOW BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW LOW BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW LOW BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW LOW BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW LOW BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW LOW BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW LOW BANK [53:48]</p>
</ul>
<h2>MASK_DATA_0_LSW HIGH BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW HIGH BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW HIGH BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW HIGH BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW HIGH BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW HIGH BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW HIGH BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW HIGH BANK [53:48]</p>
</ul>
</ul>
<h2>I2C RESET</h2>
<ul>
<p>I2C RESET</p>
<h2>DIR MODE GPIO BANK0</h2>
<ul>
<p>DIR MODE GPIO BANK0</p>
</ul>
<h2>DIR MODE GPIO BANK1</h2>
<ul>
<p>DIR MODE GPIO BANK1</p>
</ul>
<h2>MASK_DATA_0_LSW HIGH BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW HIGH BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW HIGH BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW HIGH BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW HIGH BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW HIGH BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW HIGH BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW HIGH BANK [53:48]</p>
</ul>
<h2>OUTPUT ENABLE</h2>
<ul>
<p>OUTPUT ENABLE</p>
</ul>
<h2>OUTPUT ENABLE</h2>
<ul>
<p>OUTPUT ENABLE</p>
</ul>
<h2>MASK_DATA_0_LSW LOW BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW LOW BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW LOW BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW LOW BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW LOW BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW LOW BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW LOW BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW LOW BANK [53:48]</p>
</ul>
<h2>MASK_DATA_0_LSW HIGH BANK [15:0]</h2>
<ul>
<p>MASK_DATA_0_LSW HIGH BANK [15:0]</p>
</ul>
<h2>MASK_DATA_0_MSW HIGH BANK [31:16]</h2>
<ul>
<p>MASK_DATA_0_MSW HIGH BANK [31:16]</p>
</ul>
<h2>MASK_DATA_1_LSW HIGH BANK [47:32]</h2>
<ul>
<p>MASK_DATA_1_LSW HIGH BANK [47:32]</p>
</ul>
<h2>MASK_DATA_1_MSW HIGH BANK [53:48]</h2>
<ul>
<p>MASK_DATA_1_MSW HIGH BANK [53:48]</p>
</ul>
</ul>
</ul>
</ul>
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